Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder
Reexamination Certificate
2003-06-24
2004-07-27
Young, Brian (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Differential encoder and/or decoder
C341S155000
Reexamination Certificate
active
06768437
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to sigma-delta (SD) modulators and, more specifically, to SD modulators used in, for example, analog-to-digital converter circuitry, and that employ a dither signal to suppress the generation of undesirable tones.
BACKGROUND OF THE INVENTION
The development of semiconductor technologies is currently driven by the needs of digital circuits and applications, such as microprocessors and memories. In these applications one of the main goals is to increase the signal processing power, which can be achieved by increasing the number of transistors per integrated circuit and the speed of operation, and the semiconductor technologies are developed accordingly.
From a cost point of view it is often desirable to reduce the number of components in a system. One effective technique to achieve the desired reduction in component count is to integrate the analog portions of the system on the same integrated circuit with the digital circuitry. Unfortunately, the current, state-of-the-art digital deep sub-micron CMOS processes are not well suited for analog applications. There are a number of reasons for this, including: a reduction in the maximum power supply voltages; the analog properties of active devices, such as noise and early voltage, are optimized for digital, not analog, applications; and the variety of available devices is limited, especially passive devices which are available only by incurring additional and expensive fabrication process steps.
The integration of high performance analog circuitry in these digital processes necessitates the use of suitable circuit techniques and structures. One of these techniques is based on the sigma-delta (SD) principle, which can be used in, for example, analog to digital converters (ADCs), digital to analog converters (DACs), as well as in frequency synthesizers.
From implementation and performance points of view the SD modulators (SDMs) have several favorable properties as compared to competing techniques, but they also exhibit a few weaknesses, one of them being that SDMs suffer from the generation of tones (extraneous signals), the amplitude and frequency of which depend on the amplitude and frequency of the input signal. A common way to avoid the generation of these undesirable tones is to keep the input signal in the input to the quantizer of the SD modulator sufficiently active by adding a dither signal to the SDM quantizer. The dither signal can be either random or predetermined (e.g., a sine wave or a square wave), and the amplitude may be constant or input signal dependent.
The use of SDMs in ADCs and other devices is very well known in the art. Reference may be had, by example, to S. R. Norsworthy et al., “Delta-Sigma Data Converters”, IEEE Press, NY, 1997, and to J. G. Proakis et al., Digital Signal Processing” Third Edition, Prentice-Hall, 1996.
As was noted above, the conventional SDM is known to suffer from the generation of tones, i.e., undesirable signals that manifest themselves as periodic fluctuations, the amplitude and frequency of which are a function of the amplitude and frequency of the input signal. The tones are generated primarily because the quantization noise is not always random, especially when the input signal amplitude and frequency are low. A conventional technique to overcome this problem is to use the dither signal that is added to the input signal. Reference in this regard can be had to U.S. Pat. No. 5,889,482, “Analog-to-Digital Converter Using Dither and Method for Converting Analog Signals to Digital Signals”, by M. Zarubinsky et al. The approach of Zarubinsky et al. is to add in the dither signal in the SD modulator, and to then cancel or suppress the dither signal before it reaches the output terminal of the ADC.
Other techniques for generating and using a dither signal in a SDM can be found in, as examples, commonly assigned U.S. Pat. No. 6,445,318 B1, “Method and Apparatus for Providing Signal Dependent Dither Generator for Sigma-Delta Modulator”, Antti Ruha, Tarmo Ruotsalainen and Jussi-Pekka Tervaluoto; and U.S. Pat. No. 6,462,685 B1, “Dither Signal Insertion Inversely Proportional to Signal Level in Delta-Sigma Modulators”, Vesa Korkala.
Reference can also be made to U.S. Pat. No. 6,326,911 B1, Method and Apparatus for Dithering Idle Channel Tones in Delta-Sigma Analog-to-Digital Converters”, by Gomez et al., which adds a random dither signal before quantizing a signal in order to attenuate idle channel tones.
Referring to
FIG. 1
, there is shown a simplified circuit block diagram of a conventional multi-bit sigma-delta modulator (SDM)
10
. The SDM
10
includes an input node for receiving an analog input signal and an output node for outputting a single-bit or a multibit digital output signal. The input signal is applied to a loop filter
12
, and from the output of the loop filter
12
to a quantizer
14
. As is shown in the above-referenced U.S. Pat. No. 6,445,318 B1, the input signal may also be applied to a (pseudorandom) dither signal generator block
15
. The output of block
15
is a dither signal, such as a dither current (Idither), that is applied as a second input to the quantizer
14
. The effect is to add pseudo-random noise, i.e., a dither signal, to the quantizer
14
. The use of the dither signal is preferred as it reduces the generation of tones in the output signal of the SDM
10
when the input signal amplitude is small, and thereby also increases the dynamic range of the SDM
10
. The pseudo-random dither signal generation block
15
may contain at least one linear feedback shift register (LFSR) for controlling a current steering DAC, and hence the amplitude (and polarity) of the dither current signal. The output of the quantizer
14
is applied to a suitable coder
16
that outputs a single-bit or a multiple-bit digital signal, and is also applied to a DAC
18
that forms a feedback path back to a second input of the loop filter
12
.
While the various SDMs shown in the above-reference commonly assigned U.S. Patents are all well suited for their intended applications, a need exists to provide even further embodiments of, and improvements in, SDMs that employ a dither signal generator in order to generate the dither signal in a simple manner that makes efficient use of modern digital integrated circuit technology. Further, it is desirable to reduce the amount of circuit area, and the power consumption, that is required to implement the dither signal function.
SUMMARY OF THE PREFERRED EMBODIMENTS
The foregoing and other problems are overcome, and other advantages are realized, in accordance with the presently preferred embodiments of these teachings.
This invention provides a technique to implement dithering at the input of the quantizer of a SDM, such as a switched capacitor (SC) SDM. The teachings of this invention are applicable to both single-bit and multi-bit SDM architectures. A feature of this invention is that the dither signal is added at the input of the quantizer, as opposed to being added further downstream from the quantizer input, or added to the input of an integrator, such as integrators found in the loop filter of the SDM.
This invention operates to generate a randomly varying offset voltage in the input transistors of the quantizer. The time varying offset voltage has the same effect that a voltage mode dither signal connected to the input of the quantizer would have. Normally one attempts to minimize the input offset voltage of amplifiers and comparators by using input transistors with equal dimensions and by optimizing the layout. In accordance with this invention, however, the opposite effect is desired, and is realized by artificially creating over time a mismatch in the dimensions of the input transistors, one thereby creates a time varying offset voltage that functions in a manner analogous to a SDM dither signal.
In accordance with this invention a pair of quantizer input transistors are each divided into a set of several smaller (narrower) transistors that are connected in parallel, and the effect
Korkala Vesa
Räisänen-Ruotsalainen Elvi
Ruotsalainen Tarmo
Harrington & Smith ,LLP
Nokia Corporation
Young Brian
LandOfFree
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