Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Responsive to non-optical – non-electrical signal
Patent
1998-02-13
1999-07-06
Monin, Jr., Donald L.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Responsive to non-optical, non-electrical signal
257365, 257401, 257421, H01L 2722, H01L 2968
Patent
active
059200901
DESCRIPTION:
BRIEF SUMMARY
The present invention relates to a specific and well known magnetic field sensitive device based on a Field Effect Transistor (FET) structure with a drain area splitted into two each connected to a drain contact, a gate contact area and a common source area. In literature, the device described above, is named a split-drain `MAGnetic field sensitive Field Effect Transistor`, commonly abbreviated MAGFET. MAGFETs are used for detection and measuring presence, magnitude and/or direction of a magnetic field. The output is a current difference essentially proportional to the magnetic field (magnetic induction). The sensitivity of the device is defined as the absolute value of the ratio between measured current difference (in Ampere) and magnetic induction (in Tesla).
The operating principle is based on the Lorentz force acting on electrically charged particles moving in a magnetic field: the particle(s), F, V and B are vector quantities representing the deflection force, the particle speed and the magnetic field induction (or magnetic flux density), respectively. The magnitude of F is at its maximum when V and B are perpendicular.
The Lorentz force is the common origin of operating principle for many types of magnetic field sensitive devices such as Hall effect structures, magnetic sensitive bipolar transistors and--as stated above--magnetic sensitive FET structures--MAGFETs. MAGFETs have gained widespread use due to their compatibility with standard Complementary Metal Oxide Semiconductor CMOS silicon processing allowing straightforward monolithic integration with associated analogue and/or digital electronic circuitry. MAGFETs feature good characteristics such as relatively high sensitivity for magnetic induction, a good linearity and very low cost. However, MAGFETs are also characterised by fair to poor accuracy at low magnetic inductions mainly due to offset errors (e.g. output is<>0 for B=0) between the split drains. Furthermore, this offset is a.o. a complicated function of temperature, which severely reduces the usability of MAGFETs for high precision measurements of low magnetic fields.
Magnet field sensors of various kind have been described in e.g. EP-A1-0 563 630 and U.S. Pat. No. 5,208,477.
In the first patent, a description is given of a magnetic field sensitive device in form of a lateral bipolar transistor with a base region of one type, an emitter region of the opposite type to emit charged carriers and a collector region to collect the carriers, and to which two metal contacts have been attached to split the collector current. A non-zero magnetic field will cause a Lorentz deflection of the carriers, whereby the collector current distribution is altered and a difference current may be measured between the two collector contacts.
In the second patent, different MOS FET magnetic field sensitive devices are described, e.g. an embodiment which is based on the well known MAGFET but featuring a resistive gate area under which a favourable electrical field profile may be obtained in the channel, causing a better control of carrier density in the channel for a given gate voltage bias, resulting in an increased sensitivity of the structure.
The purpose of the present invention is to improve the well known split-drain MAGFET device by structural modifications that may significantly reduce the undesired offset errors and thereby enhance the usability and performance of this device type.
According to the invention this is accomplished by splitting the MAGFET gate region into two equal sized, electrically isolated and adjacent but not overlapping gate regions, each accessible with a separate gate contact, in the following named G1 and G2. In between G1 and G2 and slightly overlapping G1 and G2, a third gate region is placed. This third gate region is electrically isolated from G1 and G2 and is accessible by a gate contact named Gc.
The device is dimensioned in a way that the device features the following behaviour:
At a certain characteristic voltage applied to Gc (with reference to the common source),
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Microtronic A/S
Monin, Jr. Donald L.
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