Switched ground read for EPROM memory array

Details Switched ground read for EPROM memory array Switched ground read for EPROM memory array

1996-10-01

1998-09-22

Nguyen, Viet Q.

Static information storage and retrieval

Floating gate

Particular connection

36518525, 36518523, 36518524, 36518521, 36518517, G11C 702

Patent

active

058124560

ABSTRACT:
A technique for reading data from a selected memory element of an EPROM array having rows and columns with addressable memory elements which may be selectively accessed at respective intersections of the rows and columns. Each memory element includes a transistor having gate, source and drain electrodes, and after selection of a particular memory element from which data is to be read by appropriately biasing the row and column associated with that memory element, the source electrode thereof is selectively connected to ground by a switching element to allow current flow through the source-drain path of the memory element and enable the readout of data therefrom after the drain and gate voltages of the memory element have stabilized.

REFERENCES:
patent: 4713797 (1987-12-01), Morton et al.
patent: 5487037 (1996-01-01), Lee

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