Switched-current bilinear integrator sampling input current on b

Details Switched-current bilinear integrator sampling input current on b Switched-current bilinear integrator sampling input current on b

1994-09-08

1995-12-05

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Specific input to output function

By integrating

327344, 327345, 327337, G06G 764

Patent

active

054732751

ABSTRACT:
A switched current bilinear integrator comprising interconnected current memory cells (M1, M2) in which, during a first phase of a clock cycle, an input current is fed to the inputs of the current memory cells and during a second phase of the clock cycle an inverted version (A1) of the input current is fed to the inputs of the current memory cells. The output of the integrator is obtained by combining the output (optionally scaled) of the first current memory cell (M1) with an inverted (A2) version of the output (optionally scaled) of the second memory cell (M2). A lossy integrator may be formed by feeding back to the input a scaled version of the current stored in the second current memory cell and an inverted, scaled version of the current stored in the first memoy cell.

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"A 5th Order Bilinear Elliptic Switched-Current Filter" by N. C. Battersby and C. Toumazou, IEEE Custom Integrated Circuits Conference, pp. 63.1-6.3.4. Mar. 1993.
"A 5th Order Bilinear Switched-Current Chebyshev Filter", I. Song and G. W. Roberts, IEEE International Symposium on Circuits and Systems, pp. 1097-1100. Jun. 1993.

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