Switched capacitor voltage reference circuits using...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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C327S539000

Reexamination Certificate

active

06819163

ABSTRACT:

BACKGROUND OF THE INVENTION
1. The Field of the Invention
The present invention relates to analog integrated circuit design, and more particularly, to voltage reference circuits that use switched capacitor configurations to provide desired temperature dependencies in the output voltage, and that uses transconductance circuits to aid in generating the reference voltage.
2. Background and Related Art
Analog circuit technology has revolutionized the way people work and play and has contributed enormously to the advancement of humankind. In many analog circuit designs, it is often desirable to have access to a voltage source other than the voltages that are supplied to the circuit as a whole (often termed Vdd and Vss). Often, the voltage desired is even higher than the highest supply voltage. To generate such high voltages, charge pumps are often used.
FIG. 7
illustrates a conventional voltage generation circuit
700
in accordance with the prior art. The voltage generation circuit
700
is configured to supply a relatively high voltage Vout on the output terminal
701
. The voltage generation circuit
700
includes an amplifier
702
having an inverting input terminal
703
, a non-inverting input terminal
704
, and an output terminal
705
. A reference voltage source
706
, which supplies a voltage Vref, is coupled to the non-inverting input terminal
704
of the amplifier
702
. The inverting input terminal
703
of the amplifier
702
is coupled to an intermediate node in a voltage divider comprising two resisters
707
and
708
having respective resistances R
1
and R
2
. The output terminal
705
of the amplifier
702
is coupled to a control circuit
708
that controls a charge pump
709
. The charge pump
709
provides charge on the output terminal
701
of the voltage regulation circuit
700
so as to generate the output voltage Vout.
During operation, when the output voltage Vout exceeds Vref times (R
1
+R
2
)/R
1
, the voltage at the inverting terminal
703
of the amplifier
702
is more than the voltage at the non-inverting terminal
704
of the amplifier
702
. Accordingly, the amplifier
702
generates a low voltage at the output terminal
705
, which causes the control circuit
708
to cause the charge pump
709
to generate less charge. Conversely, when the output voltage Vout is less than Vref times (R
1
+R
2
)/R
1
, the voltage at the inverting terminal
703
of the amplifier
702
is less than the voltage at the non-inverting terminal
704
of the amplifier
702
. Accordingly, the amplifier
702
generates a high voltage at the output terminal
705
, which causes the control circuit
708
to cause the charge pump
709
to generate more charge. Accordingly, the voltage at the output terminal
701
of the voltage regulator circuit tends to stabilize at Vref times (R
1
+R
2
)/R
1
.
The voltage regulator circuit
700
requires a reference voltage source
706
which can involve extensive circuitry. Furthermore, the reference voltage Vref, the amplifier
702
, the control circuit
708
and the charge pump
709
may have temperature dependencies that are often not desired. Accordingly, what would be advantageous are circuits that allow for the generation of a voltage having particular desired temperature dependences.
FIG. 8
illustrates a switched capacitor voltage reference circuit
800
that allows for better control and predictability over desired temperature dependencies. The desired temperature dependences are obtained by operating the circuit in two phases or time periods and switching capacitor configurations for each time period. During the first time period also referred to as the reset phase, clock signal CLK
1
is high (and the signal CLK
2
is low) indicating that the switches designated by CLK
1
are closed (and the switches designated by CLK
2
are open). Note that the switch configuration of
FIG. 8
represents the switch configuration during the reset phase. On the other hand, during the second time period also referred to herein as the generation phase, clock signal CLK
2
is high (and the signal CLK
1
is low) indicating that the switches designed by CLK
2
are closed (and the switches designated by CLK
1
are open), which is the opposite switch configuration as shown in FIG.
8
. The clock signals CLK
1
and CLK
2
for both the reset and generation phases are illustrated as curves
808
and
809
, respectively.
During the reset phase, current from current source
801
(having a magnitude that is “n” times the magnitude of current from the current source
802
) is passed through the base-emitter region of the bipolar transistor
805
. During the generation phase, current from the current source
802
is passed through the base-emitter region of the bipolar transistor
805
. During the reset phase, the emitter terminal of bipolar transistor
805
is coupled to the left terminals of both capacitors
803
and
804
. During the generation phase, the emitter terminal of bipolar transistor
805
is still coupled to the left terminal of capacitor
803
. However, the left terminal of the capacitor
804
is coupled to Vss during the generation phase. The right terminals of the capacitors
803
and
804
are coupled together and to the inverting terminal of amplifier
806
. The non-inverting terminal of the amplifier
806
is coupled to Vss. During the reset phase, the output terminal of the amplifier
806
is coupled back to the inverting terminal of the amplifier
806
thereby rendering the amplifier
806
in its unity gain configuration to define a first feedback loop. A capacitor
807
is also coupled between the output terminal of the amplifier
806
and its inverting input terminal thereby defining a second feedback loop.
If the generation and reset phases do not overlap, the output voltage Vout will generally be defined by the following Equation 1:
Vout
=
C2
C3

(
Vbe1
+
C1
C2

Ut
*
ln

(
n
)
)
(
1
)
where:
C
1
is the capacitance of capacitor
803
;
C
2
is the capacitance of capacitor
804
;
C
3
is the capacitance of capacitor
807
;
Vbe
1
is the base-emitter voltage of bipolar transistor
805
during the reset phase;
Ut is the thermal voltage; and
n is the ratio of the magnitude of the current supplied by current supply
801
to the magnitude of the current supplied by current supply
802
.
The terms Ut*ln(n) and Vbe
1
have opposite temperature dependencies (i.e., one increases with increasing temperature, and the other decreases with increasing temperature). Accordingly, by designing the size of capacitors
803
and
804
for an appropriate ratio of C
1
to C
2
, a predictable temperature dependency of Vout may be obtained. The magnitude of the output voltage Vout may be obtained by designing the size of capacitor
804
and
807
for an appropriate ratio of C
2
to C
3
.
Accordingly, the switched capacitor voltage reference circuit
800
provides a significant advancement in the art by allowing a reference voltage to be generated that has predictable temperature dependencies. Similar switched capacitor voltage regulator circuits have been described in which currents of different magnitudes are multiplexed through multiple bipolar transistors. The output voltage generated by such switched capacitor voltage regulator circuits are, however, limited. For example, the output voltage cannot exceed the supply voltage Vdd, and depends on the output range of the amplifier
806
. Furthermore, the output voltage of such switched capacitor voltage regulator circuits only generate the desired voltage during the generation phase, but not during the reset phase. Accordingly, circuits that use the reference voltage must take into account the transient nature of the reference voltage.
What would therefore be advantageous is a circuit that supplies a reference voltage that not only has a predictable temperature dependency, but also is not limited to the supply voltage of the circuit. It would further be advantageous if that circuit provided a reference voltage that was present at all times whether during the generation phase or durin

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