Switched-capacitor resistor simulation circuits

Wave transmission lines and networks – Negative resistance or reactance networks of the active type

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330107, H03H 1146

Patent

active

043319440

ABSTRACT:
An integratable switched capacitor simulation circuit comprising an integrated capacitor C3 having bottom and top plates thereof electrically connected to first and second nodes, and a pair of integrated capacitors C1 and C2 having their top plates electrically connected together. The bottom plate of C2 is electrically connected to the output of a voltage follower that has its input terminal connected to the second node. A first switch means periodically connects the top plates of C1 and C2 to the first and second nodes at a prescribed rate. When the first node is connected to a voltage source and the bottom plate of C1 is connected to either ground or the first node, the circuit simulates a source resistor across the nodes. When the first node and bottom plate of C1 are connected to ground, the circuit simulates a grounded resistor. In alternate embodiments, the capacitances of C1 and/or C3 may be zero valued for presenting an open circuit across the terminals thereof. In yet another embodiment where C1 and C3 are zero valued and the first node is connected to ground, a second switch means essentially operating 180.degree. out of phase with respect to the first switch means is located in the electrical connection of the bottom plate of C2 and the output terminal of the voltage follower for periodically connecting the bottom plate of C2 to the first node and the output of the voltage follower for causing the circuit to simulate a bilinear grounded resistor. In an alternate embodiment of this structure, the first node is connected to the output of a voltage source for simulating a bilinear source resistor.

REFERENCES:
patent: 4179665 (1979-12-01), Gregorian
Lee et al., Low-Sensitivity Switched-Capacitor Holder Filters, IEEE Trans. on CS, Jun. 1980, pp. 475-480.
Inoue et al., Switched-Capacitor Immittance Convertors Using a Single Operational Amplifier, Electronics Letters, Sep. 25, 1980, pp. 770, 771.

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