Switched-capacitor reset architecture for opamp

Details Switched-capacitor reset architecture for opamp Switched-capacitor reset architecture for opamp

2007-04-05

2008-11-11

Mai, Lam T (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

C341S155000

Reexamination Certificate

active

07450050

ABSTRACT:
An analog digital converter with switched-capacitor reset architecture. The analog to digital converter (ADC) includes a plurality of pipelined stages, each stage including an analog to digital converter comprising a pair of comparators outputting signals to a multiplying digital to analog converter (MDAC). The MDAC includes an opamp and a reset circuit connected to inputs of the opamp, the reset circuit including first and second capacitors and switching circuitry for precharging each of the first and second capacitors to a difference between the input and output common-mode voltages of the opamp, and during a reset phase of the MDAC, connecting the first capacitor between a positive input and a negative output of the opamp and connecting the second capacitor between a negative input and a positive output of the opamp to reset the opamp.

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