Switched capacitor gain stage with offset and switch feedthrough

Amplifiers – With periodic switching input-output

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330107, 328167, H03F 134

Patent

active

044045255

ABSTRACT:
An operational amplifier gain stage utilizing switched capacitor resistor equivalent circuits is designed utilizing a delayed clock reference signal (.phi..sub.D, .phi..sub.D) in a unique manner, thereby eliminating the effects of spurious error voltages (E.sub.S) generated when utilizing metal oxide silicon field effect transistors as switches (12, 15, 21, 23, 25). The single remaining MOSFET switch (21) which will contribute a spurious voltage component to the output of the operational amplifier gain stage is designed in such a manner as to minimize the spurious voltage generated during operation of the MOSFET switch. A single dummy switch (31) is utilized to further minimize the spurious voltage generated by this single MOSFET switch.

REFERENCES:
patent: 4297642 (1981-10-01), Baldwin et al.
"Analog Circuit Performance Improves with MOS/CMOS Techniques", Bingham, 8080 Wescon Conference Record, vol. 24, (1980), Sep. 16-18, Anaheim, California USA, pp. 1-14.
"Spannungsspitzen bei MeBzerhackern mit Feldeffekt-Transistoren", article by M. Seifart, KDT, Magdeburg.
Young et al., "Analog NMOS Sampled-Data Recursive Filter", 1977 IEEE International Solid-State Circuits Conference, Feb. 17, 1977, pp. 156, 157.

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