Switched capacitor circuit compensation apparatus and method

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Unwanted signal suppression

Reexamination Certificate

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C327S096000, C327S362000, C330S009000

Reexamination Certificate

active

07081789

ABSTRACT:
A compensated switched capacitor circuit comprises a switched capacitor circuit and a compensation circuit. The compensation circuit generates a reference current that varies under closed loop control to maintain a targeted slew rate for charging a reference capacitor that is determined by the input clock frequency. The switched capacitor circuit's output amplifier is configured such that its output current varies in proportion to the reference current. Thus, by configuring the reference capacitor to track the effective capacitance of the switched capacitor circuit, the settling time of the switched capacitor circuit may be made relatively insensitive to the value of and changes in the effective capacitance over a range of clock frequencies. The compensation circuit may include a clock reconditioning circuit to ensure that the switched capacitor circuit is clocked at a desired duty cycle.

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Khoury, “On the Design of Constant Settling Time AGC Circuits,” IEEE Transactions on Circuits and Systems—II: Analog and Digital Signal Processing, Mar. 1998, pp. 283-294, vol. 45, No. 3.
Klisnick et al., “Dynamic Frequency Compensation Technique for Switched-Capacitor Amplifiers,” Electronics Letters, Jun. 25, 1998, pp. 1273-1274, vol. 34, No. 13.

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