Switchboard having a dual switching system

Multiplex communications – Fault recovery – Bypass an inoperative switch or inoperative element of a...

Reexamination Certificate

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C370S220000

Reexamination Certificate

active

06442133

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a switchboard having a dual switching system for use in an ATM (Asynchronous Transfer Mode) switchboard. The present invention also relates to a method for controlling such a switchboard.
2. Description of the Prior Art
In a circuit switching system including dual ATM switches as used in an ATM switchboard, a buffer is generally provided for a 156-Mbp line or a 622-Mbp line in order to prevent a cell loss at the time of circuit switching between the dual ATM switches. The buffer generally stores ATM cells at the line terminal to prevent the ATM cells from flowing into a then-active side (ACT side) ATM switch during the switching. In a small scale ATM switchboard wherein the circuit switching system should be more compact, the ATM switchboard can hardly be provided with a large number of buffers. As a result, a problem of cell loss is encountered at the time of the circuit switching.
Japanese Patent Laid-Open Publication No. Hei. 7-264210 (first publication) describes a circuit switching system, which need not have a large number of buffers for the circuit switching system.
FIG. 1
is a block diagram of the configuration of the conventional ATM switchboard described in the first publication. The ATM switchboard includes a distribution controller
142
, a 0-system routing switch
41
0
, a 1-system routing switch
41
1
, a selecting controller
143
, and a switching controller
100
. A number of (m) input lines are connected to the distribution controller
142
, and a number of (m) 0-system (ACT: active) lines and the same number of (m) 1-system (SBY: stand-by) lines are connected to the outputs of the distribution controller
142
. All the 0-system lines on the output side of the distribution controller
142
are connected to the 0-system routing switch
41
-
0
and all the 1-system lines on the output side of the distribution controller
142
are connected to the 1-system routing switch
41
-
1
. A number of (n) 0-system lines on the output side of the 0-system routing switch
41
-
0
and a number of (n) lines on the output side of the 1-system routing switch
41
-
1
are connected to the input of the selecting controller
143
, the number of outputs of which is n. The ATM switchboard connects m input lines of the distribution controller
142
to the n output lines of the selecting controller
143
, given m and n are integers, for transferring ATM cells from any of the m input lines
21
to any of the n output lines
22
.
In the description to follow for the operation of the ATM switchboard of
FIG. 1
, it is assumed that the 0-system lines are used in the initial stage between the distribution controller
142
and the selecting controller
143
. More specifically, the distribution controller
142
and the 0-system routing switch
41
-
0
are connected together, and the 0-system routing switch
41
-
0
and the selecting controller
143
are connected together.
The connection from the distribution controller
142
to the 0-system routing switch
41
-
0
is now to be switched to the 1-system routing switch
41
-
1
. First, nXm specified cells used for the purpose of the switching are sent corresponding to the number (n) of the output lines to the m input lines of the 0-system routing switch
41
-
0
. The switching controller
100
switches the output side between the routing ro switches after all the (m×n) specified cells supplied through the m input lines appear on the output side of the 0-system routing switch
41
-
0
. More specifically, the connection from the 0-system routing switch
41
-
0
to the selecting controller
143
is switched to the connection from the 1-system routing switch
41
-
1
to the selecting controller
143
.
Thus, cell loss or line cutoff can be prevented by switching the cell routing switch at the time of switching between the 1-system and the 0-system.
Other techniques for the circuit switching system are described Japanese Patent Laid-Open Publications No. Hei, 6-303255 (second publication) and No. Hei. 11-261590 (third publication).
In the description of the first publication, the switching operation takes place only when all the specified cells provided to the m input lines of the distribution controller
142
appear on the output side of the 0-system routing switch
41
-
0
. Therefore, if part of the specified cells is lost for some reason during the cell transmission, the switching operation does not take place. This disadvantage is not solved either by the circuit switching systems or the ATM switch boards described in the second and third publications.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a circuit switching system for use in an ATM switchboard, which can prevent a cell loss without having to provide a buffer at the line to terminal near the distribution controller, regardless of whether or not part of the specified cells is lost.
The present invention provides a switchboard system including: an input/output section for receiving/transmitting cells, the input/output section having a plurality of (m) external input terminals connected to m external input lines, m external output terminals connected to m external output lines, m internal input terminals and m internal output terminals; first and second switches each for acting an active side switch or a standby side switch, each of the first and second switches having m first ascending terminals, a plurality of (n) first descending terminals, n second ascending terminals, and m second descending terminals, the m first ascending terminals being connected to the m internal output terminals through m first ascending lines, the m second descending terminals being connected to the m internal input terminals, the m first ascending terminals being coupled to n first descending terminals by switching, the n second ascending terminals being coupled to the m second descending terminals by switching; a signal processing section for processing received cells, the signal processing section having n signal input terminals connected to the n first descending terminals of each of the first and second switches through n second descending lines, and n signal output terminals connected to the n second ascending terminals of each of the first and second switches through n second ascending lines; and a control section for controlling switching between the first switch and the second switch, the control section consecutively controls during the switching so that the control section switches active side ascending cell routes from the first and second ascending lines of a then active side switch to the first and second ascending lines of the then standby side switch, that the input/output section transmits a plurality of specified cells through at least the first ascending lines and the second descending lines of the active side switch to the signal processing section, and receives the specified cells through at least the second ascending lines and the first descending lines of the active side switch, and that the control section switches active side descending cell routes from the first and second descending lines of the then active side switch to the first and second descending lines of the then standby side switch, each of given m and n being an integer.
The present invention also provides a method for controlling switching in a switchboard system having an input/output section for receiving/transmitting cells, first and second switches each for acting an active side switch or a standby side switch to transmit cells to/from the input/output section, a signal processing section for processing cells received from one of the first and second switches, the method including the consecutive steps of:
switching active side ascending cell routes from first and second ascending lines of a then active side switch to first and second ascending lines of the then standby side switch;
transmitting a plurality of specified cells through the active side switch to the signal processing secti

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