Switchable PLL circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

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Details

C327S147000, C327S155000, C327S157000, C327S158000

Reexamination Certificate

active

07576576

ABSTRACT:
An electronic circuit includes a first and a second PLL stage (PLL1, PLL2) that can be switched in parallel or in series depending on locking of the first one of the PLL circuits to an input signal (IN). When in parallel, only the second PLL circuit (PLL2) is actively supplying a clock signal to the output of the electronic circuit. The first PLL circuit (PLL1) continues trying to lock onto the input signal (IN). A lock detector (LD) monitors the locking status of the first PLL circuit (PLL1) to the input signal (IN) and, upon locking, sets switches (S1, S2) to couple the output of the first PLL circuit (PLL1) to the input of the second PLL circuit (PLL2), and to couple the output of the second PLL circuit (PLL2) to the input of the first PLL circuit (PLL1).

REFERENCES:
patent: 5184350 (1993-02-01), Dara
patent: 5332978 (1994-07-01), Yabuki et al.
patent: 5530389 (1996-06-01), Rieder
patent: 5629651 (1997-05-01), Mizuno
patent: 6204732 (2001-03-01), Rapoport et al.
patent: 6275553 (2001-08-01), Esaki
patent: 2005/0083099 (2005-04-01), Lin
patent: 2006/0001494 (2006-01-01), Garlepp et al.
patent: 0 509 706 (1992-10-01), None

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