Switchable clock source

Details Switchable clock source Switchable clock source

2002-05-29

2004-08-10

Nguyen, Linh M. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

Having selection between plural continuous waveforms

C327S298000

Reexamination Certificate

active

06774681

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a clock source selector which is capable of switching between two asynchronous clock sources with different clock rates and back again in a glitch-free manner. Such a clock source selector is sometimes termed a glitch-free multiplexer.
2. Description of the Related Art
In integrated circuit technology there is sometimes a need to switch between two clock sources which are unrelated in rate and phase. It is important that in such switching any glitch, or short pulse, is avoided. The generation of a glitch is illustrated in
FIG. 1
of the drawings, which shows two clock waveforms A and B. A switch request signal indicates whether clock A is required or clock B. If clock A is required the switch request (SW-RQ) signal takes a low value, and if clock B is required the switch request signal takes a high value. If the switch request signal is used directly to select clock A or clock B, the output shown at the bottom of the figure is obtained. This includes a short pulse at the point of the changeover, which is unacceptable for many applications. A similar glitch can occur when switching back from clock B to clock A. A glitch-free multiplexer is designed to overcome this problem, and thus is designed so as not to violate the minimum acceptable pulse width.
Known glitch-free multiplexers use state machines and are relatively complex and difficult to test. There is a need for a reliable glitch-free multiplexer which is easy to make and to test, which is reliable when having to cope with successive switch requests, and which does not introduce unnecessary delay.
BRIEF SUMMARY OF THE INVENTION
A preferred embodiment of the invention, described in more detail below with reference to the drawings, takes the form of a clock source for selecting either a first clock signal A or a second clock signal B in accordance with a switch request signal. The clock source includes three retiming circuits each consisting of two clocked flip-flops. The switch request signal is first retimed relative to clock A to give a signal P, is then retimed relative to clock B to give a signal Q, and finally is retimed relative to clock A to give a signal R. Selector circuitry operates such that when signal Q is asserted, the second clock signal B is output, when neither signal P nor signal R, as combined by a NOR gate, are asserted, the first clock signal A is output, and at other times a logic one level is output. The clock source can be used in an integrated circuit to form a glitch-free multiplexer.


REFERENCES:
patent: 4855615 (1989-08-01), Humpleman
patent: 5448597 (1995-09-01), Hashimoto
patent: 5502409 (1996-03-01), Schnizlein et al.
patent: 6239626 (2001-05-01), Chesavage
patent: 6472909 (2002-10-01), Young
patent: 0 969 350 (2000-01-01), None

Affiliated with

Also associated with

Rating

Switchable clock source does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Switchable clock source, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Switchable clock source will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3317294