Switch matrix test and control system

Details Switch matrix test and control system Switch matrix test and control system

1983-05-13

1986-02-25

Atkinson, Charles E.

Excavating

364200, 371 24, G06F 1100, G01R 3128

Patent

active

045731527

ABSTRACT:
A switch matrix system is described with which peripheral devices can be conveniently tested for compatibility with central processor units. A diagnostic channel is provided to which a peripheral device to be tested is connected at a crosspoint in the switch matrix system. A control provides a sequence of signals needed to establish data communication between the central processor unit and the peripheral device. Errors or failures in the sequence are detected and stored and displayed with a terminal from which the switch matrix system is operated. Additional testing is done by generating bit test patterns and comparing the returns with those sent out. A channel activity monitor is employed in the switch matrix system to enable a comparative review of activity of channels from different central processor units.

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patent: 4351059 (1982-09-01), Gregoire et al.
patent: 4367525 (1983-01-01), Brown et al.
patent: 4403286 (1983-09-01), Fry et al.

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