Switch driver circuit for providing small sector sizes for negat

Static information storage and retrieval – Floating gate – Particular biasing

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36518527, G11C 1134

Patent

active

056639074

ABSTRACT:
For negative gate erase and programming of non-volatile floating gate EEPROM devices, large positive or negative voltages from one single negative charge pump and from one single positive charge pump are selectively switched onto a one or more memory sectors of twin-well CMOS negative-gate-erase memory cells. The control gate is negative during erasing and positive during programming. In order for FLASH memories to have minimum layout area, small sectors or arrays of EEPROM cells can be erased all at once using a charge pump which includes two pump capacitors to provide negative voltages to the gate terminals of one or more series PMOS transistors.

REFERENCES:
patent: 5077691 (1991-12-01), Haddad et al.
patent: 5491656 (1996-02-01), Sawada
patent: 5561620 (1996-10-01), Chen et al.

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