Switch architecture for R/2R digital to analog converters

Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion

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341136, H03M 178

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active

057641749

ABSTRACT:
A switch architecture for a digital-to-analog converter provides improved linearity. A first switch for one leg of the R/2R resistance ladder includes a unit resistor coupled between the MOSFET devices of the switch and the respective leg of the R/2R ladder. The on resistances of the MOSFET devices of the first switch are controlled in response to a reference value, such as the resistance of a reference resistor, which may have a resistance and other characteristics similar to the unit resistor. Other switches for other legs of the R/2R ladder also have a unit resistor, or other MOSFET devices having an on resistance controlled in relation to the reference value. Additional switches for other legs of the R/2R ladder may also have MOSFET devices of varying width to channel (W/L) ratios. Each of these approaches may be combined to achieve a binary weighting or an alternate weighting between legs of the R/2R ladder, in order to provide low linearity error.

REFERENCES:
patent: 4558242 (1985-12-01), Tuthill et al.
patent: 4800365 (1989-01-01), White et al.
patent: 5075677 (1991-12-01), Meaney et al.
patent: 5387912 (1995-02-01), Bowers
Patent Abstracts of Japan, vol. 096, No. 007, 31 Jul. 1996 & JP 08 084078 A, 26, Mar. 1996.

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