Sweep circuit of key matrix

Details Sweep circuit of key matrix Sweep circuit of key matrix

1983-12-06

1986-04-15

Yusko, Donald J.

Communications: electrical

Continuously variable indicating

With meter reading

340365S, 340711, H04Q 900, G06F 300

Patent

active

045830924

ABSTRACT:
A sweep circuit of a key matrix, has an output circuit wherein a series circuit of a pair of transistors with a terminal interposed therebetween is inserted between a power supply and a reference potential, and a timing pulse for selectively turning on one of said pair of transistors is supplied to the gates of the pair of transistors so as to produce a key scanning signal; an input circuit wherein a transistor is inserted between a terminal connecting an output side of the key matrix and the reference potential, the key matrix being connected between the terminals of the output and input circuits; and a transistor which switches to insert a current limiting resistor between the reference potential and the transistor at the reference potential side in each of the input and output circuits in the non-read-in mode.

REFERENCES:
patent: 3950743 (1976-04-01), Hatano et al.
patent: 4188626 (1980-02-01), Frantz et al.
patent: 4398181 (1983-08-01), Yamamoto
patent: 4538146 (1985-08-01), Morris
Japanese Patent Publication (Kokoku) No. 55-43696, 1978.

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