Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board
Patent
1994-03-07
1996-07-09
Utech, Benjamin
Coating processes
Electrical product produced
Integrated circuit, printed circuit, or circuit board
4271265, 427278, 427365, 4273762, 4274192, B05D 512
Patent
active
055342906
ABSTRACT:
A multilayered ceramic chip capacitor. An electrode ink pattern is formed on a release film. The electrode ink pattern is calendered, densified and flattened. Dielectric material is applied to the release film and surrounds but does not cover the electrode ink to form an electrode surround printed dielectric sheet. The dielectric is calendered, densified and flattened. The densities of the electrode ink and dielectric are formulated such that after calendering the electrode ink and dielectric surfaces are substantially coplanar. A final overcoat of dielectric is applied over the surround printed dielectric sheet.
REFERENCES:
patent: 4692285 (1987-09-01), Bloomfield et al.
patent: 5101319 (1992-03-01), Piffexes et al.
patent: 5194335 (1993-03-01), Effenberger et al.
patent: 5292548 (1994-03-01), Rainwater
patent: 5370759 (1994-12-01), Hakotani et al.
Belko William R.
Benson Paul
Carlson, deceased Arne B.
Deffeyes Robert J.
Rainwater Jewel G.
Utech Benjamin
Visatech Corporation
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