Cleaning and liquid contact with solids – Processes – For metallic – siliceous – or calcareous basework – including...
Patent
1998-06-29
2000-02-22
Gulakowski, Randy
Cleaning and liquid contact with solids
Processes
For metallic, siliceous, or calcareous basework, including...
252 793, 252 794, C09K 1300, C09K 1308, C23G 102
Patent
active
060275715
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a surface treatment for micromachining and, more particularly, to a surface treatment used for fine treatment of silicon oxide in the manufacturing process of semiconductor devices.
2. Description of the Related Art
Fine treatment of film such as oxide film on a wafer surface is one of the most important processes in the manufacturing process of semiconductor integrated circuits. Its importance has been increasingly grown in association with progress of high integration of circuits.
Conventionally, a mixed solution (buffered hydrogen fluoride) of hydrogen fluoride (HF) and ammonium fluoride (NH.sub.4 F) is applied for fine treatment of film such as oxide film, and is usually prepared by mixing 40 percent NH.sub.4 F solution and 50 percent HF solution in various mixing rations such as in a range of 400:1 to 6:1 so as to control etching speed of silicon oxide film from 2.7 nm/min to 120 nm/min.
There are some cases in the manufacturing process of semiconductors that oxide films having various properties are formed depending on each method of forming film as well as on conditions thereof and that those films exist on the same substrate surface. When oxide films having a different property are subjected to etching with the buffered hydrogen fluoride, for example, when an SiO.sub.2 film and an SiO.sub.2 film containing P are subjected to etching with the buffered hydrogen fluoride, a step is formed at the boundary of the films because of different etching speed of the films.
Although the step of around 50 nm hardly affects the following process in the case of 1 .mu.m design rule semiconductor process, it is clear that in the manufacturing process of submicron semiconductor integrated circuits even the step of around 20 nm causes some trouble to occur in the manufacturing process and that circuit yields are reduced. Namely, it is understood that the step formed in etching process may become larger than from a depth of focus of photolithographic optical system, which induces reduction of yields in the patterning process. Then, it is also clear that this problem will be larger in association with further technological progress to reach a manufacturing process of quarter-micron semiconductor integrated circuits.
An object of the present invention is to provide, in the light of the circumstances described above, a fine surface treatment for micromachining which has nearly the same etching speed for various oxide films, each obtained by a different method as well as conditions of forming film or having different concentration of various impurities such as P, B, and As in the film and which also has a practical etching speed to each of the films.
SUMMARY OF THE INVENTION
According to the present invention a surface treatment for micromachining contains 0.1 to 8 weight percent of hydrogen fluoride and more than 40 weight percent to not more than 47 weight percent of ammonium fluoride.
A surface treatment for micromachining according to the present invention is prepared by dissolving ammonium gas into a solution of hydrogen fluoride.
A surface treatment for micromachining according to the present invention contains 0.001 to 1 weight percent of surfactant.
BRIEF DESCRIPTION OF THE DRAWINGS
The above-mentioned and other features and advantages of this invention, and the manner of attaining them, will become more apparent and the invention will be better understood by reference to the following description of an embodiment of the invention taken in conjunction with the accompanying drawings, wherein:
FIG. 1 is a schematic diagram showing a DRAM manufacturing process in Embodiment 5; and
FIG. 2 is a view conceptional showing an example of a result of measuring the surface of a silicon wafer in Embodiment 7 by an atomic force microscope.
Corresponding reference characters indicate corresponding parts throughout the several views. The exemplification set out herein illustrates one preferred embodiment of the invention, in one form, a
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Kikuyama Hirohisa
Miyashita Masayuki
Ohmi Tadahiro
Yabune Tatsuhiro
Chaudhry Saud
Gulakowski Randy
Knuth Randall J.
Stella Chemifa Kabushiki Kaisha
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