Surface mount solder method and apparatus for decoupling...

Active solid-state devices (e.g. – transistors – solid-state diode – Contacts or leads including fusible link means or noise...

Reexamination Certificate

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C257S532000, C257S738000, C257S780000, C257S924000, C257SE21647, C257SE23057, C438S957000, C438S215000, C438S613000

Reexamination Certificate

active

07135758

ABSTRACT:
A system to package high performance microelectronic devices, such as processors, responds to component transients. In one embodiment, the system includes a decoupling capacitor that is disposed between a Vcc electrical bump and a Vss electrical bump. The decoupling capacitor has Vcc and Vss terminals. The Vcc and Vss terminals share electrical pads with the Vcc electrical bump and the Vss electrical bump. A simple current loop is created that improves the power delivery for the system.

REFERENCES:
patent: 4754366 (1988-06-01), Hernandez
patent: 6222246 (2001-04-01), Mak et al.
patent: 6326677 (2001-12-01), Bloom et al.
patent: 6330164 (2001-12-01), Khandros et al.
patent: 2002/0017700 (2002-02-01), Mori et al.
patent: WO-0004595 (2000-01-01), None
Zhao, et al., “Effects of Power/Ground Via Distribution on the Power/Ground Performance of C4/BGA Packages”, Sigrity Technical Papers,(Oct. 26, 1998).

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