Surface mount peripheral leaded and ball grid array package

Details Surface mount peripheral leaded and ball grid array package Surface mount peripheral leaded and ball grid array package

1996-10-04

1998-08-04

Thomas, Tom

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Insulating material

257780, 257786, 257787, H01L 2302

Patent

active

057898111

ABSTRACT:
A surface mounted integrated circuit die package includes a group of peripheral leads extending laterally outwardly from the perimeter of the package and also includes an array of solder balls on the bottom of the package. The arrangement provides for a greater number of input/output connections to a die package by utilizing both peripheral leads and a ball grid array without requiring increases in package size or a reduction in the width of electrically conductive interconnections.

REFERENCES:
patent: 4530002 (1985-07-01), Kanai
patent: 4853757 (1989-08-01), Kuramitsu et al.
patent: 4942454 (1990-07-01), Mori et al.
patent: 5040035 (1991-08-01), Gabara et al.
patent: 5157480 (1992-10-01), McShane et al.
patent: 5239198 (1993-08-01), Lin et al.
patent: 5355016 (1994-10-01), Swirbel et al.
patent: 5355283 (1994-10-01), Marrs et al.

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