Electricity: electrical systems and devices – Electrostatic capacitors – Fixed capacitor
Reexamination Certificate
1999-03-08
2001-06-05
Reichard, Dean A. (Department: 2831)
Electricity: electrical systems and devices
Electrostatic capacitors
Fixed capacitor
C361S313000, C361S321200, C361S301400
Reexamination Certificate
active
06243253
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to the art of multilayer capacitors. In a particular aspect, the present invention relates to an improved multilayer ceramic capacitor (MLC) suitable for use as a surface mount decoupling capacitor.
Various electronic equipment will often utilize decoupling capacitors electrically connected between semiconductor chips and their associated power supply. These capacitors function as a reservoir of energy during transients caused by switching within the semiconductor chip. While typically located near the chips, decoupling capacitors are often separate capacitor devices. For various reasons, surface-mount compatible MLCs have seen widespread use for this purpose.
MLCs are generally constructed having a plurality of ceramic-electrode layers arranged in a stack. During manufacture, the stacked ceramic-electrode layers are pressed and sintered to achieve a substantially unitary capacitor body. The capacitor body is often rectangular in shape, with electrical terminals of opposite polarity provided along respective sides or at opposite ends.
SUMMARY OF THE INVENTION
The present invention recognizes various disadvantages of prior art constructions and methods. Accordingly, it is an object of the present invention to provide an improved capacitor device.
It is more particular object of the present invention to provide an improved multilayer ceramic capacitor.
It is a specific object of the present invention to provide an improved surface mount compatible decoupling capacitor for use in electronic equipment.
It is also an object of the present invention to provide a novel capacitor array structure.
Some of these objects are achieved by a multilayer capacitor device suitable for use as a surface mount decoupling capacitor. The capacitor device comprises a capacitor body including a plurality of first and second electrode plates interleaved in opposed and spaced apart relation. The capacitor body is low-aspect, and may have an aspect ratio of less than about 0.5:1. A dielectric material located between each opposing set of electrode plates provides a predetermined dielectric constant.
The first and second electrode plates each include a main electrode portion and a plurality of spaced apart lead structures extending therefrom. Respective lead structures of the first electrode plates are located adjacent respective lead structures of the second electrode plates in an interdigitated arrangement.
Corresponding lead structures of respective first electrode plates are electrically connected together. Likewise, corresponding lead structures of respective second electrode plates are also electrically connected together. This construction thus defines a plurality of electrical terminals of a first polarity and a plurality of electrical terminals of a second polarity. The electrical terminals may be formed by a thick-film terminal material.
Each lateral side of the main electrode portions may have an equal number of lead structures extending therefrom. In an exemplary construction, each lateral side has a total of two lead structures extending therefrom. In such embodiments, respective lead structures extending from one of the lateral sides may be offset by one terminal position in relation to respective lead structures extending from the opposite lateral side. In addition, a first single lead structure may extend from an end of the main electrode portion of the first electrode plates and a second single lead structure may extend from the main electrode portion of the second electrode plate.
Other objects of the present invention are achieved by an electrical circuit arrangement comprising a generally planar circuit board having a plurality of electrical current paths defined thereon. The arrangement further includes a capacitor device having a capacitor body surface mounted on the circuit board. Electrical terminals of the capacitor body are in respective electrical communication with predetermined of the current paths.
The capacitor body includes at least one first electrode plate and at least one second electrode plate situated in opposed and spaced apart relation, the electrode plates being situated in a plane substantially parallel to a plane of the circuit board. The first electrode plate has a generally rectangular first main electrode portion with a plurality of first lead structures extending therefrom. Similarly, the second electrode plate has a generally rectangular second main electrode portion with a plurality of second lead structures extending therefrom. Respective of the first lead structures are located adjacent respective of the second lead structures in an interdigitated arrangement. A ceramic material is located between each opposing set of first and second electrode plates to provide a predetermined dielectric constant.
The electrical terminals may be located on at least one lateral side of the capacitor body. For example, the electrical terminals may be located on both lateral sides of the capacitor body. Preferably, the electrical terminals are electrically connected to current paths utilizing eutectic solder.
Each lateral side of the first main electrode portions may have an equal number of the first lead structures. Likewise, each lateral side of the second main electrode portions may also have an equal number of the second lead structures. First and second lead structures located on opposite lateral sides of the respective first and second main electrode portion may be offset by one terminal position in relation to each other.
In presently preferred embodiments, the capacitor body has an aspect ratio of no more than approximately 1:1. The capacitor body may, for example, have an aspect ratio of no more than approximately 0.5:1.
Still further objects of the present invention are achieved by a multilayer ceramic capacitor comprising a capacitor body having a low aspect ratio, such as an aspect ratio of no more than 0.5:1. The capacitor body is constructed having a unitary structure characteristic of a plurality of stacked, pressed and sintered ceramic-electrode layers. A plurality of first polarity electrical terminals and a plurality of second polarity electrical terminals are located on the outer surface of the capacitor body. The terminals are formed by a thick-film terminal material.
Each ceramic-electrode layer includes an electrode plate having a main electrode portion with a plurality of lead structures extending therefrom. The electrode plates are interleaved such that respective lead structures of first alternating electrode plates are electrically connected to first polarity terminals and respective lead structures of second alternating electrode plates are electrically connected to second polarity terminals. The capacitor is constructed and arranged to exhibit an inductance of less than approximately 100 picohenries.
In some presently preferred embodiments, respective lead structures of the first alternating electrode plates are located adjacent to respective lead structures of the second alternating electrode plates in an interdigitated arrangement. In such embodiments, the capacitor body may have a generally rectangular configuration defining lateral sides of greater dimension and end sides of lesser dimension. Respective lateral sides may each have an equal number of first polarity terminals and second polarity terminals. For example, each lateral side may have two first polarity terminals and two second polarity terminals.
Still further objects of the invention are achieved by a capacitor array having a plurality of capacitor devices in a surface mount compatible package. The array comprises a capacitor body having a unitary structure characteristic of a plurality of stacked, pressed and sintered ceramic-electrode layers. The ceramic electrode layers comprise a plurality of first ceramic-electrode layers and a plurality of second ceramic-electrode layers. The capacitor body further includes a plurality of first polarity electrical terminals and a plurality of second polarity electrical termi
DuPre David A.
Galvagni John L.
Ritter Andrew P.
AVX Corporation
Dority & Manning P.A.
Reichard Dean A.
Thomas Eric
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