Suppressing digital-to-analog converter (DAC) error

Details Suppressing digital-to-analog converter (DAC) error Suppressing digital-to-analog converter (DAC) error

2006-04-18

2006-04-18

Wamsley, Patrick (Department: 2819)

Coded data generation or conversion

Converter compensation

C341S143000, C708S209000

Reexamination Certificate

active

07030792

ABSTRACT:
A digital-to-analog converter (DAC) error suppression arrangement suppresses DAC error arising from mismatched elements contained in a DAC (640and/or645) that is part of a modulator (FIG.6). A low pass averaging (LPA) index decoder650controls a shifting arrangement635to shift a digital word T2derived from modulator output Y so that the DAC error distribution constitutes a low pass profile (FIG.5). Thus, DAC error is suppressed at higher frequencies (close to half the sampling rate), thereby providing improved spurious free dynamic range (SFDR). The LPA index decoder650causes the shifting arrangement635to shift the digital word T2using only a single pointer per clock cycle.

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