Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control
Reexamination Certificate
2000-08-01
2002-07-30
Tran, Toan (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Amplitude control
C327S077000
Reexamination Certificate
active
06426664
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 11-218364, filed Aug. 2, 1999, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
The present invention relates to a suppresser which comprises MOS transistors, and more particularly to a suppresser fit for use in processing video signals in television receivers.
Hitherto, gamma correction has been widely performed to compress the white-level side component of a video signal in television receivers. In the image-receiving tube of a television receiver, the input drive voltage and the output electron-beam current generally have no linear input-output relation. Rather, the input drive voltage and the input electron-beam current has an exponential input-output relation, i.e., a non-linear input-output relation. Therefore, there exits the trend that the white-level side component of the video signal is amplified more than the black-side level component of the video signal. To compensate for the non-linear input-output relation, gamma correction is usually performed, suppressing the white-side level component of the video signal before the video signal is supplied to the image-receiving tube.
A suppresser is used to accomplish gamma correction. Most suppressers for use in the gamma correction comprise bipolar transistors, as disclosed in, for example, Jpn. Pat. Appln. KOKAI Publication No. 6-261228.
FIG. 9
is a schematic diagram of a suppresser that comprises a bipolar transistor.
FIG. 10
represents the input-output voltage characteristic of the suppresser.
The suppresser shown in
FIG. 9
comprises an input terminal
21
, an output terminal
22
, a bias-potential input terminal
23
, a PNP-type bipolar transistor
24
, a buffer circuit
25
of voltage follower type, a resistor
27
, and a resistor
28
. The buffer circuit
25
has its input connected to the input terminal
21
and its output connected to the output terminal
22
by the resistor
27
. The resistor
28
and the PNP-type bipolar transistor
24
are connected in series between the output terminal
22
and the ground potential Vss. The base of the bipolar transistor
24
is connected to the input terminal
23
of the bias potential Vb. The buffer circuit
25
converts the image signal input to the input terminal
21
into an impedance, which is applied to the output terminal
22
through the resistor
27
.
In the suppresser, the bipolar transistor
24
is not conducting while the input signal remains at level Vin that is equal to or lower than the sum (Vb+VBE) of the bias potential Vb and the base-emitter voltage VBE of the bipolar transistor
24
. Hence, the input signal has attains a gain of 0 dB. In other words, the signal is output from the terminal
22
, neither amplified nor suppressed. When the level Vin of the input signal rises above Vb+VBE, the bipolar transistor
24
is turned on. The level Vout of the output signal is therefore suppressed as indicated by the solid line A shown in FIG.
10
. The suppression level r is given as: R
1
/(Re+R
1
+R
2
), where R
1
is the resistance of the resistor
27
, R
2
is the resistance of the resistor
28
, and Re is the output impedance of the bipolar transistor
24
. The solid line A shown in
FIG. 10
bends at Vb+VBE, showing that the gain of the output signal is greater when the level Vin of the input signal lower than Vb+VBE than when the level Vin is higher than Vb+VBE. Actually, however, the gain gradually changes due to the output impedance of the bipolar transistor
24
. Thus, the ratio of the output-signal level Vout of the input-signal level Vin changes as indicated by the broken curve B shown in
FIG. 10
, but not so much as indicated by the solid bending line A.
Recently, an attempt has been made everywhere to use MOS transistors in analog signal-processing circuits, not using bipolar transistors as has been practiced hitherto, in order lower the manufacturing cost of the analog signal-processing circuits. In this technological trend it is desired that suppressers be developed which comprise MOS transistors. The suppresser of
FIG. 9
, however, cannot have desired characteristics, merely by replacing the bipolar transistor
24
with a MOS transistor.
This is because MOS transistors have an output impedance much higher than that of bipolar transistors. Generally, the output impedance of a transistor differs from the design value due to errors in the manufacturing process and changes in the temperature of the transistor.
In the suppresser shown in
FIG. 9
, the output impedance Re of the bipolar transistor
24
is negligibly small, far less than the resistances R
1
and R
2
of resistors
27
and
28
, which determine the suppression level r the circuit achieves. Thus, the suppression level r depends on almost only the resistances R
1
and R
2
. An error, if any, in the output impedance Re of the bipolar transistor
24
does not influence the suppression level r so much.
By contrast, a MOS transistor has an output impedance Re which is comparable to the resistance R
1
of the resistor
27
and the resistance R
2
of the resistor
28
. If the bipolar
24
is replaced by a MOS transistor, the output impedance Re of the MOS transistor will greatly influence the suppression level r the suppresser achieves. Consequently, the suppression level r will much change if the output impedance Re of the MOS transistor differs from the design value due to errors resulting from the manufacturing process variation or errors resulting from the temperature variation. The suppresser fails to have stable operating characteristics. Furthermore, since the MOS transistor has a much higher output impedance than the bipolar transistor
24
, the ratio of the output-signal level Vout of the input-signal level Vin changes less as indicated by the one-dot dashed curve C in
FIG. 10
, than in the case where the bipolar transistor
24
is used. Inevitably, the operating characteristic of the suppresser cannot be sufficiently.
As mentioned above, it has been increasingly expected in recent years that analog signal-processing circuits be developed which comprising MOS transistors. However, a suppresser comprising a MOS transistor can hardly have stable operating characteristics because the MOS transistor has a high output impedance.
BRIEF SUMMARY OF THE INVENTION
The present invention has been made in consideration of the foregoing. The object of the invention is to provide a suppresser which comprises MOS transistors and which can yet exhibit stable operating characteristics, despite the fact that the output impedance of each MOS transistor differs from the design value due to errors in the manufacturing process and changes as the temperature of the transistor varies.
To attain the object, a suppresser circuit according to a first aspect of the present invention, comprises a first voltage-to-current converting circuit configured to convert an input voltage signal to an output current signal; a second voltage-to-current converting circuit having a non-inverting input terminal for receiving a predetermined bias potential and an inverting input terminal for receiving the input voltage signal; and a current-limiting element connected between the first and second voltage-to-current converting circuits, configured to substantially stop a flow of current between the first and second voltage-to-current converting circuits while the input voltage signal remains at a level equal to or lower than the bias potential, and decrease the output current of the first voltage-to-current converting circuit while the input voltage signal remains at a level higher than the bias potential.
In the suppresser circuit according to the first aspect of the present invention, the first voltage-to-current converting circuit may have a non-inverting input terminal supplied with the input voltage signal and an inverting input terminal connected to an output terminal.
In the suppresser circuit
Kabushiki Kaisha Toshiba
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Tran Toan
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