Supply current based testing of CMOS output stages

Details Supply current based testing of CMOS output stages Supply current based testing of CMOS output stages

2011-06-14

2011-06-14

Nguyen, Ha Tran T (Department: 2858)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S762010

Reexamination Certificate

active

07960982

ABSTRACT:
A CMOS driver test configuration, which allows both leakage current and load current testing, using a single monitor, or current meter, located in a power lead of a tester connected to a power pad servicing the driver circuits. Both leakage testing and load current testing for CMOS drivers is described. The test configuration allows a plurality of driver circuits connected in parallel between power pads to be tested simultaneously. An ESD device, internal to the chip, is used as a load during load current testing in chip testing, and an external load is used during package testing in order to include the bonding means between the chip output pad of the driver and the package I/O pin in the current path during load current testing.

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