Superscalar microprocessor load/store unit employing a unified b

Details Superscalar microprocessor load/store unit employing a unified b Superscalar microprocessor load/store unit employing a unified b

1997-11-12

1998-11-03

Kim, Kenneth S.

395826, 395876, 395393, 39580023, G06F 9312

Patent

active

058322973

ABSTRACT:
A load/store buffer is provided which allows both load memory operations and store memory operations to be stored within it. Because each storage location may contain either a load or a store memory operation, the number of available storage locations for load memory operations is maximally the number of storage locations in the entire buffer. Similarly, the number of available storage locations for store memory operations is maximally the number of storage locations in the entire buffer. This invention improves use of silicon area for load and store buffers by implementing, in a smaller area, a performance-equivalent alternative to the separate load and store buffer approach previously used in many superscalar microprocessors.

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