Superlattice for fabricating nanowires

Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Non-heterojunction superlattice

Reexamination Certificate

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Details

C977S755000, C977S762000, C257S009000, C257S015000, C257S018000, C257SE29298, C257SE29072

Reexamination Certificate

active

07375368

ABSTRACT:
This disclosure relates to a system and method for creating nanowires. A nanowire can be created by exposing layers of material in a superlattice and dissolving and transferring material from edges of the exposed layers onto a substrate. The nanowire can also be created by exposing layers of material in a superlattice and depositing material onto edges of the exposed layers.

REFERENCES:
patent: 4947223 (1990-08-01), Biefeld et al.
patent: 5073893 (1991-12-01), Kondou
patent: 6849881 (2005-02-01), Harle et al.
patent: 6870234 (2005-03-01), Brewer et al.
patent: 7161168 (2007-01-01), Heath et al.
patent: 2004/0159851 (2004-08-01), Edmond et al.
patent: WO2004012234 (2004-02-01), None

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