Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Tunneling through region of reduced conductivity
Patent
1997-09-02
1999-09-21
Crane, Sara
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Tunneling through region of reduced conductivity
257 31, 257 36, 505702, H01L 2906
Patent
active
059557435
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND AND SUMMARY OF THE INVENTION
The invention relates to superconductive tunnel elements, tunnel stacks produced therefrom and use thereof.
EP 0 513 557 A2 discloses superconductive tunnel elements, tunnel stacks produced therefrom and uses based thereon. These tunnel elements have the structure superconductor, tunnel barrier, superconductor; there is in each instance an insulated superconductive control layer within the two superconductors. This arrangement gives a uniform and homogeneous flux of the current-induced magnetic fields of the control layers through the superconductors, so that the energy gap of the superconductors can be controlled very accurately. Moreover, the symmetrical structure of this element permits a nonproblematic integration of a plurality of elements to form a tunnel stack, in that superconductors and barriers are alternately disposed successively one on another. However, a disadvantage of this device is that a large number of individual layers are present. Thus, one superconductor already consists of five individual layers (one control layer, two insulating layers for insulating the control layer and two superconductive layers). Accordingly, the production of these tunnel cells is very costly and expensive.
The object of the invention is accordingly to specify a tunnel element which can be produced substantially more simply and cheaply with hardly any impairment of controllability as compared with EP 0 513 557 A2.
This object is achieved by a tunnel including superconductors, barriers and insulators. The tunnel element has the following layer structure: superconductor (S1), insulator (I), superconductor (S2), barrier (B), superconductor (S3), insulator (I), and superconductor (S4). Advantageously designed tunnel elements are provided. Advantageous possible circuits of the tunnel elements are specified. Advantegous tunnel stacks produced from the novel tunnel elements are also specified. Uses of the tunnel elements are also provided.
In the text which follows, the invention is explained in greater detail with reference to illustrative embodiments of tunnel elements, their circuits and of tunnel stacks and their uses.
BRIEF DESCRIPTION OF THE DRAWINGS
In the figures:
FIG. 1 shows a tunnel element with circuit diagram,
FIG. 2 shows a variant of a tunnel element with circuit diagram,
FIG. 3 shows a further variant of a tunnel element with circuit diagram,
FIG. 4 shows a further variant of a tunnel element for computer circuits, with circuit diagram,
FIGS. 5 to 8 show in each instance a tunnel stack composed of individual tunnel elements, with circuit diagram,
FIG. 9 shows a tunnel stack field on a substrate parallelepiped,
FIG. 10 shows a digital superconductive electronic camera in the pivotable Dewar with a Cassegrain mirror system in diagrammatic representation,
FIG. 11 shows a superconductive electronic coherent radiator with normal mirrors,
FIG. 12 shows a superconductive electronic coherent radiator with phase-conjugate mirrors and with frequency multiplication,
FIG. 13 shows a superconductive electronic radiation pincer in diagrammatic representation,
FIG. 14 shows a tunnel-stack-based RF-SQUID in diagrammatic representation,
FIG. 15 shows a tunnel-stack-based DC-SQUID in diagrammatic representation,
FIG. 16 shows a DC-SQUID axis field in diagrammatic representation,
FIG. 17 shows a circuit diagram of a quantum interference system.
DETAILED DESCRIPTION OF THE DRAWINGS
The tunnel element shown in FIG. 1 has the following symmetrical layer structure. On a layer-type barrier B there are disposed on both sides layer-type superconductors S2 and S3, on the free surfaces of which layer-type insulators I and, thereon, layer-type superconductors S1 and S4 are disposed. Each superconductor S1 to S4 has individual superconductive connections. The superconductors S2 and S3 are superconductive tunnel layers and are connected to a regulable signal current source A as well as to a control of the working voltage U, and a tunnel diode or a transistor is connected in the circuit
REFERENCES:
patent: 5121173 (1992-06-01), Wilson
patent: 5347143 (1994-09-01), Schroder
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