Superconducting latch driver circuit generating sufficient...

Coded data generation or conversion – Analog to or from digital conversion – With particular solid state devices

Reexamination Certificate

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C326S002000

Reexamination Certificate

active

07129870

ABSTRACT:
A circuit includes a latch circuit including a Josephson junction and configured to perform a latch operation based on a hysteresis characteristic in response to a single flux quantum, a load circuit including load inductance and load resistance and coupled to an output of the latch circuit, and a reset circuit provided between the output of the latch circuit and the load circuit and configured to reset the latch circuit a predetermined time after the latch operation by the latch circuit, wherein the Josephson junction is driven by a direct current.

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D. L. Miller, et al.; “A Josephson Sigma-Delta Analog-to-Digital Converter Using a High-Jc Process”; 8thInternational Supercondictive Electronics Conference (ISEC '01), Jun. 2001, pp. 123-124.
K. K. Likharev, et al.: “RSFQ Logic/Memory Family: A New Josephson-Junction Technology for Sub-Terahertz-Clock-Frequency Digital System”,IEEE transaction on Applied Superconductivity, vol. 1, No. 1, Mar. 1991, pp. 3-28.

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