Superconducting digital first-in first-out buffer using...

Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Tunneling through region of reduced conductivity

Reexamination Certificate

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C257S030000

Reexamination Certificate

active

06909109

ABSTRACT:
A digital first-in first-out (FIFO) buffer (10) for use with Single Flux Quantum (SFQ) superconductive integrated circuits. The digital FIFO buffer (10) includes a clock-storage circuit (14) for receiving and storing load and read clock signals (100, 104) and a data-storage circuit (16) connected to the clock-storage circuit (14) for receiving and storing data signal pulses (102) in the order which the data signal pulses (102) are received relative to the load clock signal (100). The data-storage circuit (16) outputs the SFQ pulse signal independent of the load clock signal (100). The previously stored clock and data signal pulses (100, 102) provide physical back pressure to their subsequent signal pulses.

REFERENCES:
K.K. Likharev and V.K. Semenov; “RSFQ Logic/Memory Family: A New Josephson-Junction Technology for Sub-Terahertz-Clock-Frequency Digital Systems”; IEEE Transactions on Applied Superconductivity; vol. 1; No. 1; Mar. 1991; pp. 3-28.
M.W. Johnson et al.; “NbN Circuits and Packaging for 10 Kelvin IR Focal Plane Array Sensor Signal Processing”; IEEE Transactions on Applied Superconductivity; vol. 9; No. 2; Jun. 1999; pp. 4357-4360.
L. Wittie et al.; “CNET: Design of an RSFQ Switching Network for Petaflops-Scale Computing”; IEEE Transactions on Applied Superconductivity; vol. 9; No. 2; Jun. 1999; pp. 4034-4039.
Shinichi Yorozu et al.; “Design and Implementation of an RSFQ Switching Node for Petaflops Networks”; IEEE Transactions on Applied Superconductivity; vol. 9; No. 2; Jun. 1999; pp. 3557-3560.

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