Successive approximation type A/D converter

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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341165, 341155, 307355, H03M 112

Patent

active

049086243

ABSTRACT:
A successive approximation type A/D converter of the present invention has a capacitor having a predetermined capacitance value and arranged between an input terminal of a voltage comparator and a fixed potential terminal having a predetermined potential. According to the successive approximation type A/D converter of the present invention, the capacitor arranged between the input terminal of the voltage comparator and the fixed potential terminal having the predetermined potential prevents a potential at the input node of the voltage comparator from being greatly changed to exceed a power source voltage range due the influences of a local D/A converter when the sample mode is switched to the approximation mode. Therefore, the leakage of charges stored in the input side of the voltage comparator can be prevented. Accordingly, even if the amplitude of an analog input voltage is equal to the amplitude of the power source voltage, high-precision A/D conversion can still be performed.

REFERENCES:
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patent: 4476456 (1984-10-01), Domogalla
patent: 4656429 (1987-04-01), Masuda et al.
patent: 4760287 (1988-07-01), Goto et al.
patent: 4764753 (1988-08-01), Yukawa
patent: 4791405 (1988-12-01), Rybicki et al.
patent: 4831381 (1989-05-01), Hester
Andrew G. F. Dingwall (RCA Laboatories), "Monolithic Expandable 6 Bit 20 MHz CMOS/SOS A/D Converter", IEEE J. of S.S.C., vol. SC-14, No. 6, pp. 926-932, published Dec. 1979.

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