Successive approximation register

Details Successive approximation register Successive approximation register

1987-08-31

1989-07-25

Heyman, John S.

Electrical pulse counters, pulse dividers, or shift registers: c

Shift register

Particular transfer means

377 26, 377 54, 341155, G11C 700, H03M 138

Patent

active

048521302

ABSTRACT:
A successive approximation register for an analog/digital converter operating according to the weighing method and having a bit width n includes a comparator and n memory elements each having one data input and one data output for shifting onward a logical "1" potential for each successive weighing step as well as for writing-in and storing in memory the particular result of weighing ascertained by the comparator. Multiplexers are associated with the n memory elements and have data input sides partially connected to the comparator. Logic elements are connected between the data outputs of the memory elements and the multiplexers for respectively controlling the data input sides of the multiplexers.

REFERENCES:
patent: 3510576 (1970-05-01), Centanni
patent: 4336526 (1982-06-01), Weir
patent: 4396829 (1983-08-01), Sugihara et al.
patent: 4649371 (1987-03-01), Kolluri
"Halbleiter Schaltungstechnik" by Tietze and Schenk 7th Revised Ed. Springer Verlag 1985 pp. 767-771.
IEEE Proceedings E Computers & Digital Techniques vol. 128, No. 2 Part E Mar. 1981, pp. 79-83.
Conference Record, 11th Asilomar Conf. Nov. 7-9, 1977 Pacific Grove, Calif., pp. 45-49, Russel et al.
Computer Design, vol. 11, No. 7, Jul. 1972, pp. 81-86, T. O. Anderson.

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