Successive approximation and shift register without redundancy

Details Successive approximation and shift register without redundancy Successive approximation and shift register without redundancy

1996-09-30

1999-01-12

Gaffin, Jeffrey

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

341122, 341161, H03M 134

Patent

active

058596089

ABSTRACT:
A successive approximation shift register without redundancy for a finite-state machine of the sequential type, is also effective to store the machine states. The shift register comprises a chain of logic circuits of the bistable type (FF0,FF1, . . . ) having an input stage with selectable signal inputs which are feedback connected through logic OR gate circuits (OR0,OR1, . . . ,OR6).

REFERENCES:
patent: 4553128 (1985-11-01), Pilost
patent: 4688018 (1987-08-01), Vaughn
patent: 4829302 (1989-05-01), Oitzl et al.
patent: 4851838 (1989-07-01), Shier
patent: 4852130 (1989-07-01), Draxelmayr
patent: 4940981 (1990-07-01), Naylor et al.
patent: 5061926 (1991-10-01), Washiyama
patent: 5589832 (1996-12-01), Grundvig et al.

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