Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Reexamination Certificate
2000-08-03
2001-10-16
Tokar, Michael (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
C341S150000, C341S154000, C341S155000, C341S163000, C341S172000, C341S161000
Reexamination Certificate
active
06304203
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a successive approximation type AD (analog-to-digital) converter, and more particularly to a successive approximation AD converter in which the AD conversion accuracy can be improved without increasing the number of resistors of a series resistor network for generating reference voltages for a comparator.
A microcomputer which is incorporated into an electronic apparatus, an industrial apparatus, or the like repeatedly performs the following control operation in order to control the operation of the apparatus. The microcomputer fetches a data indicating that the apparatus is in a certain state, performs a predetermined calculation process on the data, and causes the apparatus to sequentially operate by using a calculation data obtained as a result of the calculation.
In the microcomputer, the calculating process is performed in binary format, and hence there arises no problem when the calculating process is performed with fetching digital data from the external. By contrast, in the case where the calculating process is performed with fetching an analog signal, an AD converter for converting the analog signal into a digital signal most be incorporated between an input port of the microcomputer and the CPU (Central Processing Unit).
Analog-to-digital converters (hereafter called as AD converter) are classified into a batch approximation type and a successive approximation type. Hereinafter, a converter of the latter type or a successive approximation AD converter will be briefly described. When an analog signal is to be converted into an m-bit digital signal, for example, a successive approximation AD converter requires: a 2
m
number of resistors which are connected in series between a power source Vdd and the ground; a comparator which sequentially compares the analog voltage with node voltages of a specific m number of the series resistors; and an m-bit register which holds a comparison output of the comparator.
The successive approximation AD converter operates in the following manner. First, the analog signal is compared with a center voltage Vdd/2of the power source voltage Vdd and the ground. If the analog signal is higher than Vdd/2, “1” is held in the most significant bit of the register. Since it is found that the analog signal exists in (Vdd/2 to Vdd), the analog signal is then compared with a center voltage 3Vdd/4 of (Vdd/2 to Vdd). If the analog signal is lower than 3Vdd/4, for example, the comparison output “0”, is held in the second significant bit of the register. Since it is found that the analog signal exists in (Vdd/2 to 3Vdd/4), the analog signal is further compared with a center voltage 5Vdd/8 of (Vdd/2 to 3Vdd/4). If the analog signal is higher than 5Vdd/8, for example, the comparison output “1” is held in the third-significant bit of the register. An operation similar to the above is repeated until the bit reaches the least significant bit of the register, whereby an m-hit digital value corresponding to the analog signal is held by the register. The microcomputer fetches the contents of the register and then performs a desired calculation process.
The case where the resolution of the successive approximation AD converter is to be changed to (m+n) bits in order to improve the AD conversion accuracy will be considered. In such a case, conventionally, a countermeasure is taken in which the number of resistors that are connected in series between the power source Vdd and the ground is increased to 2
(m+n)
. When the resolution is to be changed from 8 bits to 10 bits, for example, the number of series resistors must be increased from 256 to 1,024.
When the number of resistors of a series resistor network is increased so as to improve the AD conversion accuracy, however, there arises a problem in that the chip area is largely widened and the production cost is raised.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a successive approximation AD conversion circuit in which the AD conversion accuracy can be improved without increasing the number of resistors of a series resistor network.
It is another object of the invention to provide a successive approximation AD converter which can produces a digital signal of more than a bits by using a series resistor network having m-bit resolution.
It is a further object of the invention to provide a successive approximation AD converter which is suitably incorporated into a microcomputer that fetches an analog signal and performs a calculation process on the signal.
In a first aspect of the invention, a successive approximation AD converter is a converter in which an analog signal is successively compared with a reference voltage by a comparator to be converted into a digital signal, wherein the converter comprises: a reference voltage generating circuit which generates plural reference voltages including first and second reference voltages; a switch which switches the plural reference voltages either to be supplied to an input node of the comparator or not to be supplied to the input node; a capacitor group consisting of an n (n is a natural number which is equal to or larger than 2) number of capacitors; a switch group consisting of an n number of switches which selectively connect the n number of capacitors in parallel to the input node of the comparator; and a control circuit which controls on/off operations of the switch and the n number of switches, in accordance with a result of the comparison by the comparator, the control circuit causes plural intermediate reference voltages to be generated at the input node of the comparator, and the comparator successively compares each of the intermediate reference voltages with the analog signal, the intermediate reference voltages being obtained by dividing the first and second reference voltages.
According to the above means, from the reference voltage which is generated by the reference voltage generating circuit, further plural reference voltages can be newly generated. Unlike the conventional art example, the AD conversion resolution can be improved without involving large widening of the chip area.
In a second aspect of the invention, a successive approximation AD converter is a converter in which an analog signal is successively compared with a reference voltage by a comparator to be converted into a digital signal, wherein the converter comprises: a series resistor network which is configured by connecting in series resistors of a number required for obtaining an m-bit digital signal, and which generates plural reference voltages; a switch which switches the plural reference voltages generated by the series resistor network either to be supplied to an input node of the comparator or not to be supplied to the input node; a capacitor group consisting of an n (n is a natural number which is equal to or larger than 2) number of capacitors; a switch group consisting of an n number of switches which selectively connect the n number of capacitors in parallel to the input node of the comparator; and a control circuit which controls on/off operations of the switch and the n number of switches, during a period when the analog signal is converted to a corresponding m-bit digital signal, the control circuit maintains the switch to an on state, and the n number of switches to an off state, and after the conversion is ended, controls on/off operations of the switch and the number of switches in accordance with a result of the comparison by the comparator, thereby causing plural intermediate reference voltages to be generated at the input node of the comparator, the intermediate reference voltages being obtained by dividing the reference voltages generated by the series resistor network, and the comparator successively compares each of the intermediate reference voltages with the analog signal, thereby converting the analog signal into an (m+n) bit digital signal.
According to the above means, it is possible to provide a successive approximation AD converter which can produce an (m+
Fish & Richardson P.C.
Mai Lam T.
Sanyo Electric Co,. Ltd.
Tokar Michael
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