Substrate with fluidic channel and method of manufacturing

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C216S002000, C216S027000, C438S739000, C438S740000

Reexamination Certificate

active

06555480

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to substrates with fluidic channels and methods for manufacturing.
BACKGROUND OF THE INVENTION
In some fluid ejection devices, such as printheads, fluid is routed to an ejection chamber through a slot in the substrate. Often, slots are formed in a wafer by wet chemical etching with, for example, alkaline etchants. Such etching techniques result in etch angles that cause a very wide backside slot opening. The wide backside opening limits how small a particular die on the wafer could be and therefore limits the number of die per wafer (the separation ratio). It is desired to maximize the separation ratio.
SUMMARY
In one embodiment, a method of manufacturing a fluidic channel through a substrate includes etching an exposed section on a first surface of the substrate, and coating the etched section of the substrate. The etching and the coating are alternatingly repeated until the fluidic channel is formed.


REFERENCES:
patent: 5387314 (1995-02-01), Baughman et al.
patent: 5393711 (1995-02-01), Biallas et al.
patent: 5441593 (1995-08-01), Baughman et al.
patent: 5498312 (1996-03-01), Laermer et al.
patent: 5501893 (1996-03-01), Laermer et al.
patent: 5526454 (1996-06-01), Mayer
patent: 5541140 (1996-07-01), Goebel et al.
patent: 5756901 (1998-05-01), Kurle et al.
patent: 6008138 (1999-12-01), Laermer et al.
patent: 6051503 (2000-04-01), Bhardwaj et al.
patent: 6081635 (2000-06-01), Hehmann
patent: 6096656 (2000-08-01), Matzke et al.
patent: 6107209 (2000-08-01), Ohkuma
patent: 19538103 (1997-04-01), None
patent: 0822582 (1988-02-01), None
patent: 0865151 (1998-09-01), None
patent: 0886307 (1998-12-01), None
patent: 0978832 (2000-02-01), None
patent: 2245366 (1992-01-01), None
patent: 2290413 (1995-12-01), None
patent: 2341348 (2000-03-01), None
patent: 60154622 (1985-08-01), None
patent: 63013334 (1988-01-01), None
patent: 03196623 (1991-08-01), None
patent: 04045529 (1992-02-01), None
patent: 04218925 (1992-08-01), None
patent: WO 9837577 (1998-08-01), None
patent: WO 0023376 (2000-04-01), None
2001 Institution Of Electrical Engineers; “An Array Of Hollow Microcapillaries For The Controlled Injection Of Genetic Materials Into Animal/Plant Cells”; by: K. Chun et al.;Electrical Mechanical Systems (MEMS); Abstract Only; Copyright 1999, IEE.
2001 Institution Of Electrical Engineers: “Cryogenic Etching Of Deep Narrow Trenches In Silicon”; by: Aachboun et al.; Journal Of Vacuum Science & Technology A; vol. 18; No. 4; pt. 1-2; Abstract only; Copyright 2000, IEE.
“Deep Etching Key To The MEMS/MST Revolution”; by: Gadil Prashant;Copyright 1998 Reed Publishing USA or 1999 Gale Group; p. 38;Jul. 1998.
“Anisotropic Silicon Etch Characterization In The TFTL STS Etcher”; Aug. 20, 1999; pp. 1-5.
“Etching Characteristics And Profile Control In A Time Multiplexed Inductively Coupled Plasma Etcher”; by: AA Ayon, CC Lin, RA Braff & MA Schmidt of the Department of Electrical Engineering And Computer Science (EECS); Solid-State Sensor and Actuator Workshop Hilton Head Island, SC; Jun. 8-11, 1999; pp. 41-44.
“Characterization of a Time Multiplexed Inductively Coupled Plasma Etcher”; by: AA Ayon, R Braff, CC Lin HH Sawin & MA Schmidt; Journal of The Electrochemical Society; 146 (1); 1999; pp. 339-349.
“Bosch Deep Silicon Etching: Improving Uniformity And Etch”; by: F Laermer A Schilp K Funk & M Offenberg; Bosch GmBH, Germany; 1999 IEEE; pp: 211-216.
“Recent Advances In Silicon Etching For MEMS Using The ASE Process”; by: AM Hymes H Ashraf JK Bhardwaj J Hopkins I Johnson & JN Shepherd;Sensors And Actuators A Physical; 1999; pp:13-17.
“Advanced Silicon Etching Using High Density Plasms”; by: JK Bhardwaj & H Ashraf; Reprinted from: Micromachining And Microfabrication Process Technology; SPIE—The International Society For Optical Engineering; vol. 2639; 1995; pp: 224-237.
STS—Surface Technology Systems—1st ASE Users Meeting Agenda and Information; California; 1997; pp. 1-38.
“High-Aspect-Ratio Si Etching For Microsensor Fabrication”; by: WHJuan & SW Pang; Journal of Vacuum Sci. Technology A; 1995; pp: 834-838.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Substrate with fluidic channel and method of manufacturing does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Substrate with fluidic channel and method of manufacturing, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Substrate with fluidic channel and method of manufacturing will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3071086

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.