Substrate voltage generator for semiconductor device

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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Details

C327S143000

Reexamination Certificate

active

06271714

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor, and more particularly to a substrate voltage generator for a semiconductor which prevents a substrate voltage from being generated at an abnormally extreme level.
2. Discussion of the Background
In a semiconductor device receiving initial power-up voltage, a substrate voltage generator is required to supply a stable substrate voltage up to a predetermined level.
FIG. 1
schematically illustrates a typical substrate voltage generator. As shown therein, a conventional substrate voltage generator
1
supplies a desired substrate voltage V
BB
with the start of power-up detection.
The substrate voltage generator
1
, connected with a power supply detector
2
, receives a detection signal at a predetermined level supplied from the power supply detector
2
in accordance with the power-up. The substrate voltage generator
1
is composed of a controller
11
, an oscillator
12
and a pump circuit
13
. The substrate voltage V
BB
is outputted from the pump circuit
13
as a final output.
With reference to
FIGS. 2A through 2C
, an operation of the substrate voltage generator
1
will be described.
First, the start of power-up is informed by which a level of an externally applied power supply voltage Vcc is detected by the power supply detector
2
, and the power supply detector
2
at a high level is transited to a low level, as shown in
FIG. 2A
, and informs the transit point by a reset signal. The power supply voltage Vcc is gradually increased up to a predetermined level in accordance with the power-up, and the power supply detector
2
detects the predetermined level and thus generates the reset signal.
The thusly generated reset signal is applied to the controller
11
of the substrate voltage generator
1
. The controller
11
supplies an oscillator enable signal OSCEN, which was transited to a high level at the point where the reset signal was generated, as shown in
2
B, to the oscillator
12
. The controller
11
which controls the operation of the oscillator
12
to obtain the desired substrate voltage V
BB
level is constructed to sense the level of the substrate voltage V
BB
.
The oscillator
12
corresponds to the signal supplied from the controller
11
and generates an oscillation signal OSC which has a predetermined cycle. The oscillation signal OSC from the oscillator
12
is supplied to the pump circuit
13
which will generate the substrate voltage V
BB
, as shown in FIG.
2
C. Since the initial level of the substrate voltage V
BB
is considerably different from the desired value, the substrate voltage generator
1
operates so that the substrate voltage V
BB
is sensed by the controller
11
, for thus obtaining the desirable voltage level.
When the substrate voltage V
BB
level reaches the desired value, the oscillator enable signal OSCEN supplied from the controller
11
is outputted at a low level, as shown in
FIG. 2B
, for thereby completing the operation of the substrate voltage generator
1
.
In the conventional art, however, when the level of the externally applied power supply voltage Vcc is high, or a substrate voltage loading is small, for example when the substrate voltage V
BB
is pumped at an extreme level because the driving capability of pumping for generating the substrate voltage V
BB
is great, the substrate voltage V
BB
level may not be controlled. In such a case, as shown in
FIG. 2C
, the final level of the substrate voltage V
BB
may be reached faster than the designed arrival time allated for the substrate voltage to reach the desired level. This unwanted situation may cause erroneous operations in other voltage generators of the chip device, and particularly become the cause of reference voltage generators being faulty. In other words, an erroneous operation of the substrate voltage generator in the initial power-up for the semiconductor device may change the reference voltage, due to the substrate voltage level being too low or too high.
Similarly, when a precharge voltage V
BLP
with respect to bit lines or a cell plate voltage V
CP
in a semiconductor memory device has an abnormally high or low level, the substrate voltage varies due to an erroneous operation related to other factors which are operated with the relation to the voltage level, and thus the entire semiconductor device may have operational problems.
SUMMARY OF THE INVENTION
Accordingly, an object of the present invention is to provide a substrate voltage generator which is stably operated in a semiconductor device.
Another object of the present invention is to provide a substrate voltage generator for a semiconductor device that prevents a substrate voltage from changing at too great a rate in initial power-up of the semiconductor device.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, in a substrate voltage generator of a semiconductor device for supplying power to a semiconductor substrate up to a predetermined level during power-up, the substrate voltage generator for a semiconductor device includes: a control unit for controlling an operation of the semiconductor voltage generator in accordance with a generated substrate voltage level when power is applied; an oscillator operated by the control unit; a pump circuit for performing a pumping operation in accordance with the oscillator, for thereby generating a substrate voltage; and an extreme operation preventing unit for preventing the substrate voltage from being generated at an extreme level by controlling the operation of the oscillator in accordance with the generated substrate voltage level at each of a plurality of periods, until the substrate voltage reaches a predetermined desired value.
In the above construction, in order to achieve the objects of the present invention, the extreme operation preventing means is provided with a plurality of delay means and a plurality of substrate voltage sensing means, each being separately operated during each of a plurality of time periods.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide and further explanation of the invention as claimed.


REFERENCES:
patent: 5003197 (1991-03-01), Nojima et al.
patent: 5367489 (1994-11-01), Park et al.
patent: 5399928 (1995-03-01), Lin et al.
patent: 5408140 (1995-04-01), Kawai et al.
patent: 5506540 (1996-04-01), Sakurai et al.
patent: 5602506 (1997-02-01), Kim et al.
patent: 5767729 (1998-06-01), Song
patent: 5907257 (1999-05-01), Liu et al.
patent: 5945870 (1999-08-01), Chu et al.
patent: 5952872 (1999-09-01), Hur

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