Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2003-08-06
2004-12-07
Lee, Eddie (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S701000
Reexamination Certificate
active
06828682
ABSTRACT:
FIELD
This invention relates to the field of integrated circuit fabrication. More particularly, this invention relates to packaging for integrated circuits.
BACKGROUND
Integrated circuits, such as bump bonded flip chip integrated circuits, are typically electrically and mechanically housed in a package prior to use in a larger circuit. The package provides several important functions for the integrated circuit. First, the package provides mechanical and structural support to the integrated circuit, and thus protects it from physical damage. Additionally, the substrate, which is the interposer between the integrated circuit and the printed circuit board and forms the base of the package, physically spreads out, or routes, the electrical connections that are made to the integrated circuit on one side of the substrate, so that electrical connections to other parts of the overall circuit, such as to a printed circuit board, can be more easily made on the other side of the substrate.
One type of substrate is fabricated with a relatively rigid sheet of a non-electrically conductive material, called a core, upon which one or more build-up layers are formed, typically on both sides of the core. For example, the core may have electrically conductive layers formed on both of its sides, which are then covered with a non-electrically conductive layer, and then another electrically conductive layer, and so on until the desired number of electrically conductive layers have been formed.
The electrically conductive layers in the substrate are patterned, typically at the time that they are formed, so as to provide specific functions. For example, on an electrically conductive layer on which signals from the integrated circuit are conducted, the layer typically includes a plurality of electrically conductive lines or signal traces, which route the signal from one part of the substrate, such as an inner portion, to a different part of the substrate, such as a more peripheral portion. An electrically conductive layer that provides a ground plane is typically a large, contiguous, electrically conductive sheet. Finally, an electrically conductive layer that provides a power plane typically includes multiple electrically conductive sheets that do not electrically connect one with another, at least not on that same layer.
Electrical connections from one to another of the electrically conductive layers of the substrate are provided by forming holes in the non-electrically conductive layers between them, and either coating or filling the holes with an electrically conductive material. Such structures are called vias. Vias typically must also be formed through the substrate core. These core vias can be formed by mechanical or laser drilling. Because the core is typically much thicker than any of the build-up layers, core vias are often much larger than the vias that extend between the electrically conductive build-up layers.
Unfortunately, the large size of the core vias can present problems when designing a substrate. For example, in one substrate design it is desirable for all of the core vias to be disposed in an array in the center of the core. However, this relatively dense array of large core vias prohibits making direct electrical connections between contacts on the integrated circuit that overlie the core via array and the electrically conductive layers disposed directly on the core, because the electrically conductive layer typically cannot be “threaded” through the relatively densely packed via array to reach the location that underlies the centrally disposed integrated circuit contact.
What is needed, therefore, is a substrate design that allows for electrical connections between the electrically conductive layer on the substrate core and electrical contacts that overlie a centrally disposed and densely packed core via array.
SUMMARY
The above and other needs are met by a substrate design that includes a non-electrically conductive core having a first side and an opposing second side. A first electrically conductive layer is disposed on the first side of the core, and a second electrically conductive layer is disposed on the second side of the core. Electrically conductive core vias extend from the first side of the core to the second side of the core. The core vias are disposed in an array. An electrically conductive contact is formed on an upper build-up layer on the first side of the core, and overlies the array of core vias. It is desired to connect the contacts on this upper build-up layer to the electrically conductive layer on the first side of the core. A first electrically conductive via connects the contact to an intervening build-up layer disposed between the upper build-up layer and the first electrically conductive layer. The first via overlies the core via array. A second electrically conductive via connects the intervening build-up layer and the first electrically conductive layer on the core, where the second electrically conductive via is not disposed over the core via array.
In this manner, contacts that are disposed over the core via array can be electrically connected to the electrically conductive layer disposed on the core, even when the core via array is too dense to be penetrated by the electrically conductive layer, or in other circumstances where it is undesirable for the electrically conductive layer to extend into the core via array. Further, this is accomplished without the need to completely sacrifice the utility of one of the other layers, or by adding an entirely new layer.
In various preferred embodiments, the intervening layer is a signal routing layer, a portion of which is used for making the desired electrical connections. The core via array is preferably centrally disposed in the substrate. Preferably, the core via array is too densely packed for the first electrically conductive layer to penetrate the core via array. The contact is preferably a VDDIO contact disposed in an interior portion of the substrate. Preferably, the first electrically conductive layer is a VDDIO layer. Preferably, the first via, intervening layer, and second via are a plurality of intervening layers and a plurality of electrically conductive vias electrically connecting the contact to the first electrically conductive layer. A packaged integrated circuit including the substrate described is also disclosed herein.
Lee Eddie
LSI Logic Corporation
Luedeka Neely & Graham P.C.
Owens Douglas W.
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