Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means
Reexamination Certificate
2006-04-27
2010-06-29
Nguyen, Danny (Department: 2836)
Electricity: electrical systems and devices
Safety and protection of systems and devices
Load shunting by fault responsive means
C361S111000
Reexamination Certificate
active
07746607
ABSTRACT:
Electrostatic discharge (ESD) protection device and process for protecting a conventional FET. The device includes at least one FET body forming a resistance, and a triggering circuit coupled to a protection FET and the resistance. The resistance raises a voltage of the at least one body, such that the protection FET is triggered at a voltage lower than the conventional FET.
REFERENCES:
patent: 6034388 (2000-03-01), Brown et al.
patent: 6096584 (2000-08-01), Ellis-Monaghan et al.
patent: 6331726 (2001-12-01), Voldman
patent: 6380570 (2002-04-01), Voldman
patent: 6384452 (2002-05-01), Chittipeddi et al.
patent: 6404269 (2002-06-01), Voldman
patent: 6507469 (2003-01-01), Andoh
patent: 6909149 (2005-06-01), Russ et al.
patent: 7064358 (2006-06-01), Manna et al.
patent: 7068482 (2006-06-01), Chen
patent: 2005/0121702 (2005-06-01), Voldman et al.
patent: 2005/0167786 (2005-08-01), Gill et al.
patent: 2006/0043489 (2006-03-01), Chen et al.
Gauthier Jr. Robert J.
Li Junjun
Mitra Souvick
Putnam Christopher S.
International Business Machines - Corporation
Kotulak Richard
Nguyen Danny
Roberts Mlotkowski Safran & Cole P.C.
LandOfFree
Substrate triggering for ESD protection in SOI does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Substrate triggering for ESD protection in SOI, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Substrate triggering for ESD protection in SOI will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4163017