Radiant energy – Photocells; circuits and apparatus – With circuit for evaluating a web – strand – strip – or sheet
Reexamination Certificate
2001-12-12
2003-06-03
Porta, David (Department: 2878)
Radiant energy
Photocells; circuits and apparatus
With circuit for evaluating a web, strand, strip, or sheet
C250S559440, C235S454000
Reexamination Certificate
active
06573523
ABSTRACT:
FIELD
This invention relates to the field of integrated circuit fabrication. More particularly, the invention relates to identifying a substrate by detecting indicia formed on the surface of the substrate.
BACKGROUND
The substrates on which integrated circuits are fabricated typically undergo several process steps. It is desirable to identify the substrate at each step of the process, so as to track the substrate through the various fabrication and testing steps. It is further desirable to identify the substrate by automated means rather than by human operators, so as to reduce potential damage due to mishandling, reduce subjective variation in the identification process, and to speed the fabrication process.
Typically, substrates are identified by characters, such as the alphanumeric characters of a serial number, which have been formed in the surface of the substrate. These characters are used in tracking and verifying the idntity of the substrate throughout the manufacturing process to ensure that the proper process steps are performed on the substrate. In prior systems, the substrate identification characters are read using a charge coupled device (CCD) camera which captures a digital image of the identification characters. In other words, a digital photograph of the substrate is taken.
Generally, the prior systems process the characters using character recognition algorithms which must be “taught” how to recognize the expected characters based on sample characters provided on the surface of a calibration substrate. How well the algorithm is able to recognize characters on an process substrate depends at least in part on how well the process substrate's surface matches the surface of the calibration substrate and how closely the environment of the calibration substrate matches that of the process substrate.
For example, the amount of light, the color of the substrate surface, the angle of the substrate surface relative to the optical axis of the camera, and the distance between the substrate and the camera all have an effect. During substrate processing, the color of the surface of the substrate may change significantly from step to step. To accommodate these expected changes in color, the calibration of the substrate identification systems at each of the process steps should take these changes into account.
Due to the level of effort required to calibrate and maintain the current substrate identification systems, such systems are typically not used at each process step. The lack of such systems at each process step increases the likelihood that a substrate will miss a required process step, or will otherwise be handled improperly.
What is needed, therefore, is a reliable process for identifying a substrate, preferably at each manufacture and testing step, where the reliability of the identification process is not significantly affected by changes in the optical characteristics of the surface of the substrate or by other environmental factors.
SUMMARY
The above and other needs are met by a method for identifying a substrate having a surface. The method includes forming in the surface of the substrate indicia having an indicia length in a first direction and an indicia width in a second direction, and having edge features and substantially flat features. The indicia is illuminated with incident illumination from an illumination source, where the incident illumination has an illumination length substantially in the first direction and an illumination width substantially in the second direction.
Relative motion is generated between the substrate and the illumination source, thereby scanning the incident illumination over the indicia. Reflected illumination having a first intensity level is received from the edge features of the indicia, and reflected illumination having a second intensity level is received from the substantially flat features of the indicia.
The reflected illumination is detected to produce at least one output signal having a first amplitude level corresponding to the first intensity level and a second amplitude level corresponding to the second intensity level. The at least one output signal is processed based at least in part upon the first and second intensity levels to form at least one image portion of the indicia. The indicia is recognized based at least in part upon the at least one image portion. The substrate is then identified based at least in part upon the indicia.
In preferred embodiments of the invention, the reflected illumination is detected using a substantially linear array of detection devices that are substantially aligned in the first direction and distributed over a length substantially equal to the illumination length. The plurality of detection devices produce a corresponding plurality of output signals which are processed based at least in part upon the first and second intensity levels to form a corresponding plurality of image portions of the indicia. The plurality of image portions are combined to form a two-dimensional image of the indicia. The indicia is recognized based at least in part upon the two-dimensional image.
Since the indicia is recognized based on a pattern of edge features and flat features, the recognition process is not substantially affected by changes in environmental lighting conditions, or changes in the color or reflectivity of the surface of the substrate from one process step to the next. Also, because recognition of the indicia is not based upon indicia characteristics that differ significantly from one process step to the next, the system does not require constant teaching and learning to recognize the indicia, as have prior identification systems.
REFERENCES:
patent: 3714632 (1973-01-01), Cribbs et al.
patent: 5247166 (1993-09-01), Cannon et al.
patent: 5481095 (1996-01-01), Mitsuda et al.
patent: 5677522 (1997-10-01), Rice et al.
Lee Patrick J
LSI Logic Corporation
Luedeka Neely & Graham P.C.
Porta David
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