Substrate structure capable of reducing package singular stress

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With separate tie bar element or plural tie bars

Reexamination Certificate

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Details

C257S678000, C257S778000

Reexamination Certificate

active

06933592

ABSTRACT:
A substrate structure capable of reducing the package singular stress comprises a substrate having a plurality of substrate units. A molding gate is provided at a corner of each substrate unit. A plurality of slots are provided at the periphery of each substrate unit. A connection portion is provided between every two adjacent slots. These connection portions include a first connection portion and two second connection portions. The first connection portion is located at each molding gate. The second connection portions are located between two adjacent corners of each substrate unit, and opposite to each other. Through appropriate position arrangement of the connection portions, the molding gate stress at the corner of each package unit can be reduced. Moreover, the situation of breakage of trace in the substrate and peeling of molding compound from the substrate can be avoided.

REFERENCES:
patent: 5953589 (1999-09-01), Shim et al.

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