Substrate, semiconductor device using the same, method for...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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Details

C257S738000, C257S755000, C257SE21008, C257S790000, C257S791000, C257SE23021, C257SE23069, C257SE21508, C257S796000, C438S018000

Reexamination Certificate

active

08053878

ABSTRACT:
A substrate including therein a plurality of conductor layers laminated via insulating layers, the substrate mounting at least one semiconductor integrated circuit, wherein the substrate includes a first electrode terminal connected to the semiconductor integrated circuit, a second electrode terminal connected to a terminal on an upper substrate arranged in a layer over the substrate, and on at least part of the perimeter of the first and second electrode terminals, a third electrode terminal located outside the outer edge of the upper substrate.

REFERENCES:
patent: 6914259 (2005-07-01), Sakiyama et al.
patent: 7041513 (2006-05-01), Akram
patent: 7445962 (2008-11-01), Choi et al.
patent: 2004/0178508 (2004-09-01), Nishimura et al.
patent: 2005/0006784 (2005-01-01), Nakayama
patent: 2005/0139988 (2005-06-01), Ishida
patent: 2005/0263759 (2005-12-01), Shiozawa
patent: 2006/0131719 (2006-06-01), Nakayama
patent: 2007/0254404 (2007-11-01), Gerber et al.
patent: 2003-133510 (2003-05-01), None
patent: 2004-363126 (2004-12-01), None
patent: 2005-302871 (2005-10-01), None
patent: 2006-344789 (2006-12-01), None

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