Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Reexamination Certificate
2006-05-02
2006-05-02
Owens, Douglas W (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including dielectric isolation means
C257S506000
Reexamination Certificate
active
07038292
ABSTRACT:
A substrate isolation design includes a P substrate, a P well positioned on the P substrate, at least a device positioned in the P well, and at least a P substrate guard ring surrounding the device. A P+ guard ring, an N well guard ring, or a deep N well guard ring can be selectively interposed between the P substrate guard ring and the device to facilitate blocking substrate coupling effect.
REFERENCES:
patent: 6831346 (2004-12-01), Li et al.
patent: 2003/0197242 (2003-10-01), Chen et al.
Owens Douglas W
United Microelectronics Corp.
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