Substrate for semiconductor package, fabrication method thereof,

Details Substrate for semiconductor package, fabrication method thereof, Substrate for semiconductor package, fabrication method thereof,

1997-05-16

2000-11-28

Guay, John

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

257690, 257692, 257700, 257724, 361730, 361735, 361761, 174260, 174261, H01L 2302

Patent

active

061539287

ABSTRACT:
A substrate for a semiconductor package, a fabrication method for the substrate, thereof and a stacked-type semiconductor package using the substrate, and a method of making the package are disclosed. The substrate includes: an insulator having top and bottom surfaces, there being upper and lower recesses respectively formed in the top and bottom surfaces of the insulator; plural first upper and lower conductive lines respectively formed at least in part on exposed surface of the upper and lower recesses; and plural second upper and lower conductive lines respectively formed at least in part on the top and bottom surfaces and connected with corresponding ones of the first upper and lower conductive lines, respectively, the second upper and lower conductive lines extending outwardly from the upper and lower recesses, respectively.

REFERENCES:
patent: 5241456 (1993-08-01), Marcinkiewicz et al.
patent: 5432681 (1995-07-01), Linderman
patent: 5631497 (1997-05-01), Miyano et al.
patent: 5633530 (1997-05-01), Hsu
patent: 5723900 (1998-03-01), Kojima et al.
patent: 5798564 (1998-08-01), Eng et al.
patent: 5926376 (1999-07-01), Cho
patent: 6020629 (2000-02-01), Farnworth et al.

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