Substrate for producing semiconductor packages

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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Details

C257S678000

Reexamination Certificate

active

11133727

ABSTRACT:
A parent or master substrate for a semiconductor package is provided, which can provide a plurality of unit substrates by cutting into pieces for producing a semiconductor device. The parent substrate includes an insulation layer, conductor patterns formed on first and second surfaces of the insulation layer, and PSR (photo solder resist) layers respectively formed on the first and second surfaces of the insulation layers and covering the conductor patterns. The parent substrate includes an upper part and a lower part divided by a reference surface which passes through the center of the insulation layer. When an equivalent thermal expansion coefficient αupperof the upper part is defined by the Equation ofαupper=∑i=1n⁢αi×Ei×vi∑i=1n⁢Ei×vi,where αiis respective thermal expansion coefficients of, Eiis respective elastic moduli of, and viis respective volume ratios of first through nthcomponents constituting the upper part (e.g., insulation layer, conductor patterns, and PSR layers of the upper part), and an equivalent thermal expansion coefficient αlowerof the lower part is defined by the Equation ofαlower=∑j=1m⁢αj×Ej×vj∑j=1m⁢Ej×vj,where αjis respective thermal expansion coefficients of, Ejis respective elastic moduli of, and vjis respective volume ratios of first through mthcomponents constituting the lower part (e.g., insulation layer, conductor patterns, and PSR layers of the lower part), a equivalent thermal expansion ratio (αupper/αlower) of αupperto αloweris selected to be within a range of 0.975 through 1.165.

REFERENCES:
patent: 2000299359 (2000-10-01), None
patent: 1020030022703 (2003-03-01), None
patent: 1020030070423 (2003-08-01), None
patent: 1020030072953 (2003-09-01), None

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