Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2001-03-27
2004-05-04
Zarneke, David A. (Department: 2827)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S255000, C029S837000
Reexamination Certificate
active
06730859
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a substrate for mounting an electronic part or electronic parts thereon, the substrate having a laminate structure of an insulation layer and a patterned wiring line layer on each side of a core substrate, and a method of producing the mounting substrate.
2. Description of the Related Art
As an electronic part-mounting substrate having a high density of patterned wiring lines, a substrate having patterned wiring lines formed at both sides of a core substrate, such as a glass-epoxy substrate, made by a build-up process, is known. On such an electronic part-mounting substrate, electronic parts, such as resistors and capacitors, semiconductor elements, and semiconductor devices having a packaged semiconductor element, may be mounted.
FIG. 7
illustrates an example of a printed-circuit board
5
on which electronic parts
6
are mounted. Lead pins
6
a
are inserted in holes
7
which are formed in the printed-circuit board
5
and have conductor layers
8
formed on their inside walls. The conductor layer
8
extends over the surface of the board
5
to thereby form a land
10
. The lead pin
6
a
is bonded to the conductor layer
8
and the land
10
by solder
9
. The formation of the conductor layer
8
and the land
10
is performed by a plating process. The board
5
may have patterned wiring lines on a surface or surfaces thereof, although such wiring lines are not shown in the drawing.
FIG. 8
illustrates an example of prior substrate
4
having two layers of patterned wiring lines
24
(or
24
′) formed at each of two sides of a core substrate
20
, so as to be formed on an insulation layer
22
(or
22
′), which isolate an underlying layer of wiring line and an overlaying layer of wiring line, by a build-up process, and having electronic parts
6
mounted thereon. The patterned wiring lines
24
at one side of the substrate
4
are electrically connected to the patterned wiring lines
24
′ at another side by through holes having a structure made up of a hole
26
piercing through the core substrate
20
and a conductor layer
28
formed on the inside wall of the hole
26
. Holes
7
in which lead pins
6
a
are to be inserted are formed so as to pierce through the core substrate
20
as well as the insulation layers
22
,
22
′, and have conductor layers
8
formed on the inside walls thereof. The lead pins
6
a
inserted in the holes
7
are bonded to the conductor layer
8
and lands
10
,
10
′, which are formed around the opening of the holes
7
, by solders
9
.
FIGS. 9A
to
9
C show the manufacture of the mounting substrate
4
illustrated in FIG.
8
. Referring to
FIG. 9A
, patterned wiring lines
24
are formed on both sides of a core substrate
20
, so as to be formed on an insulation layer
22
,
22
′, by a conventional build-up process. The patterned wiring lines
24
at one side of the substrate
4
are connected to the patterned wiring lines
24
′ at another side by a conductor layer
28
formed on the inside wall of a hole
26
piercing through the core substrate
20
. The hole
26
is filled with a resin material prior to the formation of the insulation layers
22
,
22
′ located directly on the surfaces of the core substrate
20
, or is filed with a resin material of a film to be laminated to the core substrate
20
for the formation of the insulation layer
22
,
22
′ located directly on the surfaces of the core substrate
20
.
The core substrate
20
provided with the insulation layers
22
,
22
′ and the patterned wiring lines
24
,
24
′ is then drilled to have holes
7
piercing through the core substrate
20
and the insulation layers
22
,
22
′ at both sides of the core substrate
20
, in which holes lead pins
6
a
of electronic parts
6
(
FIG. 8
) are subsequently inserted, as illustrated in FIG.
9
B.
After the formation of the holes
7
, the core substrate
20
is subjected to successive electroless plating and electroplating with copper to have conductor layers
8
on the inside walls of the holes
7
and lands
10
,
10
′ on the surfaces of the outermost insulation layers
22
,
22
′. The lands
10
,
10
′ are formed by patterning conductor layers plated on the outermost insulation layers
22
,
22
′ by an etching process. Concurrently with the formation of the lands
10
,
10
′, patterned wiring lines may be formed from the conductor layers on the outermost insulation layers
22
,
22
′.
In the substrate
4
for mounting electronic parts described above, a material, such as a polyimide or epoxy resin, is used for the insulation layers
22
,
22
′, and a material, such as a glass-epoxy composite material, is used for the core substrate
20
. As a consequence of the difference in materials used for the core substrate and the insulation layers, there is a problem that highly precise formation of holes
7
, in which lead pins of electronic parts are to be inserted, by drilling or the like, is difficult. Since in a recent circuit board, miniaturized semiconductor elements and parts are arranged at high density, high precision is needed for the arrangement and sizing of the holes for the insertion of the lead pins, and high precision in making the holes for the insertion of the lead pins is required.
When the plated conductor layer
8
is formed on the inside wall of the hole
7
piercing through the core substrate
20
and the insulation layers
22
,
22
′, as shown in
FIG. 9C
, the plated layer
8
has a large thickness to a certain extent. Under the circumstances, the formation of a very small pattern of wiring lines is difficult when the wiring lines are formed, concurrently with the formation of the conductor layer
8
on the inside wall of the hole
7
, by patterning the plated conductor layers on the surfaces of the outermost insulation layers
22
,
22
′ by etching. Although it is possible to form patterns of wiring lines in a high density on the surfaces of the insulation layers
22
,
22
′ by such a process in which the outer surfaces of the insulation layers
22
,
22
′ are masked during the plating of the inside walls of the holes
7
for the insertion of lead pins, and the holes
7
are then filled with a resist or the like during the formation of conductor layers for the patterned wiring lines on the surfaces of the insulation layers
22
,
22
′ by plating, or a process in which the insulation layers on the surfaces of the outermost insulation layers
22
,
22
′, which have been formed during the plating of the insides of the holes
7
, are removed by grinding, and fresh insulation layers for the formation of patterned wiring lines are then formed on the surfaces of the insulation layers
22
,
22
′, these processes are complicated.
SUMMARY OF THE INVENTION
It is an object of the invention to solve the above problems by providing a substrate for mounting electronic parts, which enables electronic parts, such as resistors and capacitors, to be mounted thereon by inserting their lead pins in holes of the substrate, and in which the holes for the insertion of the lead pins can be formed with high precision, and patterned wiring lines can be formed at high density.
It is also an object of the invention to provide a method appropriate for the production of the substrate for mounting electronic parts of the invention.
The substrate for mounting an electronic part or electronic parts thereon according to the invention comprises a core substrate and at least a set of an insulation layer and a patterned wiring line layer, which is formed on the insulation layer, at at least one side of the core substrate, the core substrate having holes, in each of which a lead pin of the electronic part to be mounted is to be inserted, and being provided with lands which surround the opening of the hole and to which the lead pin inserted in the hole is to be bonded, wherein the insulation layer or layers at at least one s
Imai Kazunari
Muramatsu Shigetsugu
Norris Jeremy
Shinko Electric Industries Co. Ltd.
Zarneke David A.
LandOfFree
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