Metal treatment – Barrier layer stock material – p-n type
Reexamination Certificate
2000-06-30
2002-10-08
Christianson, Keith (Department: 2813)
Metal treatment
Barrier layer stock material, p-n type
Reexamination Certificate
active
06461447
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a substrate for epitaxial growth (hereinafter referred to as an epitaxially substrate) and a semiconductor device using such a substrate, and more specifically concerns an epitaxial substrate utilizing an OSF generation area of a silicon single crystal rod and a semiconductor device formed on such a substrate.
Japanese Unexamined Patent Publication No. Hei. 11-189493 has disclosed an epitaxial substrate used for manufacturing an epitaxial wafer.
This epitaxial substrate is a silicon wafer made from a silicon single crystal doped with nitrogen in a predetermined density, and silicon is epitaxially grown on its surface. When thermally oxidized, the wafer of this type of a silicon single crystal is subjected to the generation of OSFs (Oxidation Induced Stacking Fault), the density of which is not less than 10
2
/cm
2
.
When an epitaxial layer is grown on this epitaxial substrate having OSFs, crystal defects due to the OSF nuclei serve as gettering sites during the device processes.
However, in the case of such a conventional epitaxial substrate, since the doping process using nitrogen is required, its single crystal growth process becomes complex.
Therefore, the objective of the present invention is to easily manufacture an epitaxial substrate with a higher gettering property.
SUMMARY OF THE INVENTION
The present invention, relates to an epitaxial substrate having a surface on which silicon is epitaxially grown, made of an OSF generation area of a single crystal silicon rod that has been grown by the Czochralski (CZ) method.
This OSF generation area refers to an area that is subjected to generation of OSFs in a density of not less than 10
2
/cm
2
, for example, upon application of a thermal process.
The present invention, which relates to an epitaxial substrate having a surface on which silicon is epitaxially grown made of a top portion of a single crystal silicon rod that has been grown by the CZ method.
In this case, the top portion refers to a portion from a position at which a desired diameter is obtained to an OSF generation area.
The present invention, relates to an epitaxial substrate having a surface on which an epitaxial layer is stacked, made of a single crystal silicon rod that has been grown by the CZ method in such a manner that OSF defect nuclei exist in a density of 10
5
to 3×10
7
/cm
3
and the area having the OSF defect nuclei, formed on the wafer, accounts for not less than 25% of the total wafer area.
In this case, the OSF defect nuclei refer to defect nuclei that are supposed to form OSF defects upon application of a thermal process.
The OSF defect nuclei less than 10
5
/cm
3
results in insufficiency in the gettering property. In contrast, the OSF defect nuclei exceeding 3×10
7
/cm
3
causes the occurrence of defects in the epitaxial layer.
The present invention relates to an epitaxial substrate made of a CZ single crystal silicon rod which is heated from 800° C., at which it was loaded, to 1100° C. at a temperature-rise rate of 4° C. /minute and then subjected to a water vapor oxidizing treatment for 60 minutes so that OSFs occur in a density of not less than 100/cm
2
.
The present invention includes a semiconductor device that uses an epitaxial substrate formed as follows: an epitaxial layer is grown, on the surface of an epitaxial substrate according to the invention, and MOS-type devices are formed on this epitaxial layer.
The present invention makes it possible to increase the gettering property of an epitaxial substrate.
Moreover, in this case, even one portion of the silicon single crystal, which has been considered to be unusable conventionally, can be utilized effectively.
Moreover, in accordance with the present invention, MOS-type devices are assembled on the surface of an epitaxial layer stacked on the surface of the epitaxial substrate. For example, these are MOS transistors (nMOS, pMOS, CMOS). Therefore, this epitaxial substrate is capable of gettering impurities during the device process, thereby making it possible to improve the device characteristics of MOS, and the like.
REFERENCES:
patent: 5296047 (1994-03-01), Fellner
patent: 5419786 (1995-05-01), Kokawa et al.
patent: 5919302 (1999-07-01), Falster et al.
patent: 6162708 (2000-12-01), Tamatsuka et al.
patent: 6228164 (2001-05-01), Ammon et al.
patent: 2001/0025597 (2001-10-01), Falster et al.
patent: 2001/0039916 (2001-11-01), Mule′Stagno et al.
patent: 11-189493 (1999-07-01), None
Kimura Yasuhiro
Koya Hiroshi
Matsukawa Kazuhito
Shinyashiki Hiroshi
Yamamoto Hidekazu
Christianson Keith
Mitsubish Denki Kabushiki Kaisha
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