Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate
2005-06-21
2005-06-21
Potter, Roy (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
C257S778000
Reexamination Certificate
active
06909183
ABSTRACT:
For a component mounted with the flip-chip technique, in particular surface wave elements, it is proposed to use a low-shrinkage ceramic substrate over which (as needed) multi-layer metallizations are produced by metal deposition. The bumps can also be produced by self-aligning metal deposition.
REFERENCES:
patent: 5904563 (1999-05-01), Yu
patent: 6570469 (2003-05-01), Yamada et al.
patent: 6743534 (2004-06-01), Lautzenhiser et al.
Donnay et al, “Chip-Package Codesign of a Low-Power 5-GHz RF Front End”,Proceedings of the IEEE, vol. 88, No. 10, Oct. 2000, pp. 1583-1597.
Baier, “Akustische Oberflächenwellenfilter-Schrittmacher der passiven Integration”,Elektronik Industrie-Bauelemente, Oct. 2000, pp. 48-51.
Wong et al, “Low Cost Flip Chip Bumping Technologies”1997 IEEE/CPMT Electronic Packaging Technology Conference, Oct. 8, 1997, pp. 244-250.
Jung et al, “Integration of Flip Chip Assembly in the SMT Process: Manufacturing an Productivity Issues”,1998 IEEE/CPMT Int'l Electronics Manufacturing Technology Symposium, Oct. 19, 1998, pp. 8-15.
Feiertag Gregor
Krüger Hans
Stelzl Alois
Epcos AG
Potter Roy
Schiff & Hardin LLP
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