Substrate control voltage circuit of a semiconductor memory

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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Details

C327S537000

Reexamination Certificate

active

06265932

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention relates to a substrate voltage control circuit of a semiconductor memory. In a semiconductor memory, the voltage on a substrate having a region where a memory cell is formed is controlled. As a conventional semiconductor device, there is a circuit as disclosed in Japanese Patent Laid-Open Publication No. 62-121996. In this circuit, a substrate bias generation circuit generates a voltage to be applied to a substrate, and a voltage detection circuit detects whether the voltage to be applied to the substrate reaches a given voltage value.
In a conventional semiconductor memory, a voltage to be applied to a substrate has a predetermined value. If a threshold value of a transistor is shifted owing to variations in a fabricating process, or the like, there has occurred a case where data is inferiorly written on a memory cell or written data has not been stored.
SUMMARY OF THE INVENTION
To solve the foregoing problem, a semiconductor memory of the invention comprises a memory cell part, a voltage generation circuit for generating a substrate voltage of the memory cell part, a threshold value detection circuit for outputting threshold value detection signals in response to a threshold value of a transistor formed on the memory cell part, and a voltage detection circuit for detecting the substrate voltage generated by the voltage generation circuit, outputting a voltage detection signal at a given voltage in response to the threshold value detection signals to stop the operation of the voltage generation circuit.


REFERENCES:
patent: 5307315 (1994-04-01), Oowaki et al.
patent: 5668487 (1997-09-01), Chonan
patent: 5874851 (1999-02-01), Shiota
patent: 6075404 (2000-07-01), Shindoh et al.
patent: 5-54650 (1993-03-01), None

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