Substrate connector for integrated circuit devices

Details Substrate connector for integrated circuit devices Substrate connector for integrated circuit devices

2005-06-30

2009-02-24

Clark, S. V (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

C257S778000

Reexamination Certificate

active

07495330

ABSTRACT:
In one embodiment, a stack is assembled comprising a first integrated circuit package, and a substrate connector which connects the integrated circuit package to a circuit board. In one embodiment, the substrate connector includes an interposer substrate and a patch substrate bonded to the interposer substrate. Each substrate includes columnar conductors extending through the substrate to connect to another layer. Other embodiments are described and claimed.

REFERENCES:
patent: 5321583 (1994-06-01), McMahon
patent: 6095823 (2000-08-01), Banks
patent: 6245594 (2001-06-01), Wu et al.
patent: 6255740 (2001-07-01), Tsuji et al.
patent: 6294407 (2001-09-01), Jacobs
patent: 6319829 (2001-11-01), Pasco et al.
patent: 6372620 (2002-04-01), Oosawa et al.
patent: 6451627 (2002-09-01), Coffman
patent: 6469908 (2002-10-01), Patel et al.
patent: 6528874 (2003-03-01), Iijima et al.
patent: 6548328 (2003-04-01), Sakamoto et al.
patent: 6586684 (2003-07-01), Frutschy et al.
patent: 6589870 (2003-07-01), Katoh
patent: 6617236 (2003-09-01), Oosawa et al.
patent: 6646337 (2003-11-01), Iijima et al.
patent: 6671947 (2004-01-01), Bohr
patent: 6782610 (2004-08-01), Iijima et al.
patent: 6814584 (2004-11-01), Zaderej
patent: 6828221 (2004-12-01), Iijima et al.
patent: 6854985 (2005-02-01), Weiss
patent: 6884709 (2005-04-01), Iijima et al.
patent: 6908792 (2005-06-01), Bruce et al.
patent: 6977441 (2005-12-01), Hashimoto
patent: 7034401 (2006-04-01), Savastiouk et al.
patent: 7097462 (2006-08-01), Ichikawa
patent: 7268419 (2007-09-01), Cornelius
patent: 2003/0207492 (2003-11-01), Maeda et al.
patent: 2006/0038303 (2006-02-01), Sterrett et al.
patent: 2006/0077644 (2006-04-01), Nickerson et al.
Chipsupply.com, “Chip Scale Packaging (CSP)”, [online], [retrieved on Apr. 22, 2004], retrieved from the Internet at <URL: http://www.chipsupply.com/corporate/interconnect%20solutions/chip%20scale.htm>.
Dataweek, “Stacked-CSP Delivers Flexibility, Reliability and Space-Saving Capabilities”, [online], Aug. 27, 2004, [Retrieved on Jul. 14, 2004], retrieved from the Internet at <URL: http://dataweek.co.za
ews.asp?pklNewsID=11744&pklIssueID=348&pklCategoryID=36>.
IMEC, “Advanced Packaging Technologies to Bridge the Interconnect Technology Gap”, downloaded prior to Aug. 23, 2004, pp. 1-8.
Intel Corporation, “Silicon: Packaging Solutions for a Mobile Marketplace”, [online], 2004, [Retrieved on Jul. 14, 2004], retrieved from the Internet at <http://www.intel.com/research/silicon/mobilepackaging.htm>.
Intel Corporation, “The Chip Scale Package (CSP)”, 2000 Packaging Databook, 2000, Ch. 15, pp. 15-1 through 15-16.
IVF—The Swedish Institute of Production Engineering Research, “Chapter B: Flip-Chip Technology”, [online], [retrieved on Apr. 22, 2004], retrieved from the Internet at <URL: http://extra.ivf.se
gl/B-Flip-Chip/ChapterB1.htm>.
Mahajan, R., K. Brown, and V. Atluri, “The Evolution of Microprocessor Packaging”, Intel Technology Journal, Q3, 2000, pp.
Mahajan, R., R. Nair, V. Wakharkar, J. Swan, J. Tang, and G. Vandentop, “Emerging Directions for Packaging Technologies”, Intel Technology Journal, vol. 6, Issue 2, May 2002, pp. 62-75.
Mallik, D., K. Radhakrishnan, J. He, C. Chiu, T. Kamgaing, D. Searls, & J.D. Jackson, “Advanced Package Technologies for High-Performance Systems,” Intel Technology Journal, vol. 9, Issue 4, Nov. 9, 2005, 16 pp.
McCormick, A., “Pins & Vias: New Processes, Materials Extend Flexible Circuit Use”, [online], May 2003, [Retrieved on Jul. 14, 2004], retrieved from the Internet at <http:/
easia.nikkeibp.com
ea/200305/manu—244639.html>.
North Corporation, “Neo-Manhattan Technology: A Novel HDI Manufacturing Process”, from IPC Flex & Chips Symposium, Feb. 2003, 32 pp.

Affiliated with

Also associated with

Rating

Substrate connector for integrated circuit devices does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Substrate connector for integrated circuit devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Substrate connector for integrated circuit devices will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4063673