Substrate bonding with bonding material having rare earth metal

Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S107000, C438S113000, C257SE21499, C257SE21599

Reexamination Certificate

active

07981765

ABSTRACT:
A microchip has a bonding material that bonds a first substrate to a second substrate. The bonding material has, among other things, a rare earth metal and other material.

REFERENCES:
patent: 3949118 (1976-04-01), Nagano et al.
patent: 4499655 (1985-02-01), Anthony
patent: 5089880 (1992-02-01), Meyer et al.
patent: 5229647 (1993-07-01), Gnadinger
patent: 5326726 (1994-07-01), Tsang et al.
patent: 5355022 (1994-10-01), Sugahara et al.
patent: 5417111 (1995-05-01), Sherman et al.
patent: 5511428 (1996-04-01), Goldberg et al.
patent: 5610431 (1997-03-01), Martin
patent: 5620931 (1997-04-01), Tsang et al.
patent: 5693574 (1997-12-01), Schuster et al.
patent: 5939633 (1999-08-01), Judy
patent: 6114188 (2000-09-01), Oliver et al.
patent: 6118181 (2000-09-01), Merchant et al.
patent: 6236115 (2001-05-01), Gaynes et al.
patent: 6297072 (2001-10-01), Tilmans et al.
patent: 6306516 (2001-10-01), Jin et al.
patent: 6307169 (2001-10-01), Sun et al.
patent: 6319617 (2001-11-01), Jin et al.
patent: 6335224 (2002-01-01), Peterson et al.
patent: 6346742 (2002-02-01), Bryzek et al.
patent: 6384353 (2002-05-01), Huang et al.
patent: 6429511 (2002-08-01), Ruby et al.
patent: 6433411 (2002-08-01), Degani et al.
patent: 6436853 (2002-08-01), Lin et al.
patent: 6448109 (2002-09-01), Karpman
patent: 6448622 (2002-09-01), Franke et al.
patent: 6504253 (2003-01-01), Mastromatteo et al.
patent: 6537831 (2003-03-01), Kline
patent: 6621168 (2003-09-01), Sundahl et al.
patent: 6625367 (2003-09-01), Coult et al.
patent: 6753208 (2004-06-01), MacIntyre
patent: 6853067 (2005-02-01), Cohn et al.
patent: 6893574 (2005-05-01), Felton et al.
patent: 6906395 (2005-06-01), Smith
patent: 6909146 (2005-06-01), Linn et al.
patent: 6911727 (2005-06-01), Martin et al.
patent: 6933163 (2005-08-01), Yun et al.
patent: 6936918 (2005-08-01), Harney et al.
patent: 6962835 (2005-11-01), Tong et al.
patent: 7018484 (2006-03-01), Atanackovic
patent: 7034393 (2006-04-01), Alie et al.
patent: 7104129 (2006-09-01), Nasiri et al.
patent: 7132721 (2006-11-01), Platt et al.
patent: 7220614 (2007-05-01), Martin
patent: 7291561 (2007-11-01), Ma et al.
patent: 7329056 (2008-02-01), Sherrer et al.
patent: 7334491 (2008-02-01), Rudhard et al.
patent: 7425166 (2008-09-01), Burt et al.
patent: 7442570 (2008-10-01), Nasiri et al.
patent: 7458263 (2008-12-01), Nasiri et al.
patent: 7692521 (2010-04-01), Cohn
patent: 2003/0013969 (2003-01-01), Erikson et al.
patent: 2004/0219763 (2004-11-01), Kim et al.
patent: 2004/0232500 (2004-11-01), Rudhard et al.
patent: 2005/0003652 (2005-01-01), Ramanathan et al.
patent: 2005/0170609 (2005-08-01), Alie et al.
patent: 2005/0181579 (2005-08-01), Thallner
patent: 2005/0269678 (2005-12-01), Martin et al.
patent: 2005/0280635 (2005-12-01), Hinata
patent: 2006/0118946 (2006-06-01), Alie et al.
patent: 2006/0208326 (2006-09-01), Nasiri et al.
patent: 2007/0295456 (2007-12-01), Gudeman et al.
patent: 2008/0122073 (2008-05-01), Yen
patent: 2008/0157651 (2008-07-01), Yoo et al.
patent: 2008/0237823 (2008-10-01), Martin
patent: 2008/0283990 (2008-11-01), Nasiri et al.
patent: 2008/0314147 (2008-12-01), Nasiri et al.
patent: 2008/0315334 (2008-12-01), Martin
patent: 2009/0007661 (2009-01-01), Nasiri et al.
patent: 2009/0029152 (2009-01-01), Yun et al.
patent: 1 219 565 (2002-07-01), None
patent: 1 296 374 (2003-03-01), None
patent: WO 96/13062 (1996-05-01), None
patent: WO 00/37912 (2000-06-01), None
patent: WO 01/56921 (2001-08-01), None
patent: WO 02/42716 (2002-05-01), None
patent: WO 02/093122 (2002-11-01), None
patent: WO 2004/091838 (2004-10-01), None
patent: WO 2009/049958 (2009-04-01), None
Y. Tomita et al.,Advanced Packaging Technologies on 3D Stacked LSI Utilizing the Micro Interconnections and the Layered Microthin Encapsulation,IEEE, May 29, 2001, pp. 347-355.
Boustedt et al.,Flip Chip as an Enabler for MEMS Packaging,2002 Electronic Components and Technology Conference, Apr. 2002, pp. 124-128.
Ok et al.,Generic, Direct-Chip-Attach MEMS Packaging Design with High Density and Aspect Ratio through-Wafer Electrical Interconnect,2002 Electronic Components and Technology Conference, Apr. 2002, pp. 232-237.
MEMS: Mainstream Process Integration,Ziptronix White Paper, 7 pages.
Teomim et al.,An Innovative Approach to Wafer-Level MEMS Packaging,Solid State Technology, printed Dec. 2, 2002, 3 pages.
ShellBGA,www.shellcase.com/pages/products-shellbga.asp, printed Dec. 2, 2002, 2 pages.
Seeger et al.,Fabrication Challenges for Next-Generation Devices: Microelectromechanical Systems for Radio-Frequency Wireless Communications,J. Microlith., Microfab., Microsyst., vol. 2, No. 3, Jul. 2003, pp. 169-177.
Park et al.,A Novel Low-Loss Wafer-Level Packaging of the RF-MEMS Devices,2002 IEEE, Doc. No. 0-7803-7185, Feb. 2002, pp. 681-684.
Ok et al.,High Density, High Aspect Ratio Through-Wafer Electrical Interconnect Vias for MEMS Packaging,2003 IEEE Transactions on Advanced Packaging, vol. 26, No. 3, Doc. No. 1521-3323, Aug. 2003, pp. 302-309.
Premachandran et al.,A Novel Electrically Conductive Wafer Through Hole Filled Vias Interconnect for 3D MEMS Packaging,2003 Electronic Components and Technology Conference, May 2003, pp. 627-630.
Ando et al.,New Packaging Technology for SAW Device,Corporate Components Development Center, Doc. No. WA1-3, pp. 403-406, Dec. 1995.
Chavan et al.,A Monolithic Fully-Integrated Vacuum-Sealed CMOS Pressure Sensor,2000 IEEE, Doc. No. 0-7803-5273-4/00, Apr. 2000, pp. 341-346.
Wolffenbuttel,Low-Temperature Intermediate Au-Si Wafer Bonding; Eutectic or Silicide Bond,Sensors and Actuators A 62 (1997) pp. 680-686.
Martin,Wafer Capping of MEMS with Fab-Friendly Metals,Analog Devices Inc., Micromachined Products Division, SPIE presentation, Jan. 19, 2007.
Li M. Chen Kuang Yang, U.S. Appl. No. 12/436,569, entitled Nickel-Based Bonding of Semiconductor Wafers, USPTO, filed on May 6, 2009 , 30 pages.
Changhan Yun, U.S. Appl. No. 12/398,774, entitled Low Temperature Metal to Silicon Diffusion and Silicide Wafer Bonding, USPTO, filed on Mar. 5, 2009, 34 pages.
Ko, et al,Bonding Techniques for Microsensors, Micromachining and Micropackaging of Transducers,pp. 198-208, 1985.
C.M.T. Law, et al, Microstructure Evolution and Shear Strength of Sn-3.5Ag-Re Lead-free BGA Solder Balls, City University of Hong Kong, pp. 60-65, 2004.
Le Liang, et al.,Effect of Cerium Addition to Board Level Reliability of Sn-Ag-Cu Solder Joint,Samsung Semiconductor (China) R&D Co., Ltd, 4 pages, 2007.
X. Ma, et al.,High Reliable Solder Joints Using Sn-Pb-LA Solder Alloy,National Key Laboratory of Reliability Physics of Electronic Product, pp. 63-66, 2001.
Min Pei, et al.,Effect of Rare Earth Elements on Lead-Free Solder Microstructure Evolution,Georgia Institute of Technology, pp. 187-204, 2007.
Daniel T. Rooney, Ph.D, et al.,Metallurgical Analysis and Hot Storage Testing of Lead-Free Solder Interconnects: SAC versus SACC,Flextronics International, pp. 89-98, 2008.
Min Pei, et al.,Creep and Fatigue Behavior of SnAg Solders With Lanthanum Doping,IEEE Transactions on Components and Packaging Technologies, vol. 31, No. 3, pp. 712-718, Sep. 2008.
Yangshan Sun, et al.,Lead-free Solders Based on the Sn-8Zn-3Bi Ternary Alloy with Additions of In, Nd or La,6thInternational Conference on Electronic Packaging Technology, 5 pages, 2005.
Hareesh Mavoori, et al.,Universal solders for direct and powerful bonding on semiconductors, diamond, and optical materials,Applied Physics Letters, vol. 78, No. 19, pp. 2976-2978, May 7, 2001.
Wang L, et al.,The evaluation of the new composite lead free solders with the novel fabricating process,2004 International Conference of the Business of Electronic Product Reliability and Liability, pp. 50-56, 2004.
C.M. Lawrence Wu,A Promising Lead-free Material for Flip-Chip Bumps: Sn-Cu-RE,City University of Hong Kong, pp. 17-26, Oct. 14-16, 2002.
Shinji Takayama,Annealing Characteristics of AI-Light-Rare-Earth Alloy Thin Films for Microelectronic Conductor Lines,Mat. Res. Soc. Symp. Proc., vol. 403, pp. 645-650, 1996.
Ramirez, et al.,Bonding nature of rare-earth containing lead-free solders,Applied Physics Lett

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Substrate bonding with bonding material having rare earth metal does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Substrate bonding with bonding material having rare earth metal, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Substrate bonding with bonding material having rare earth metal will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2685715

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.