Substrate bias generating circuit

Details Substrate bias generating circuit Substrate bias generating circuit

1982-05-26

1984-09-11

Wong, Peter S.

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

307297, 307200B, 307304, H03L 100, H03K 3353

Patent

active

044712901

ABSTRACT:
A substrate bias generating circuit includes an oscillator circuit having a control terminal and a bias generating circuit for generating a negative substrate bias voltage responsive to the output signal of the oscillator circuit. The substrate bias generating circuit further includes a voltage divider connected between the output terminal of the bias generating circuit and a ground terminal, and a level sensor for producing a control signal to the oscillator circuit when it is detected that the output voltage of the voltage divider reaches a predetermined value, to thereby stop the oscillating operation of the oscillator circuit.

REFERENCES:
patent: 3806741 (1974-04-01), Smith
patent: 4142114 (1979-02-01), Green
patent: 4266151 (1981-05-01), Hoffmann et al.
patent: 4322675 (1982-03-01), Lee et al.
patent: 4344121 (1982-08-01), Weber
patent: 4388537 (1983-06-01), Kanuma
Martino et al., "An On-Chip Back Bias Generator for MOS Dynamic Memory", IEEE Journal of Solid-State Circuits, vol. SC-15, No. 5, (Oct. 1980), pp. 820-825.
"Fast Mostek ROM Has 350-ns Access", Electronics Magazine, Sep. 16, 1976, pp. 42 and 43.

Affiliated with

Also associated with

Rating

Substrate bias generating circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Substrate bias generating circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Substrate bias generating circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1197061